feat(trgm): generate trgm consts

hpm-data-gen/src/main.rs

@@ -7,6 +7,7 @@ mod pinmux;
 mod pins;
 mod registers;
 mod sysctl;
+mod trgmmux;
 
 #[macro_export]
 macro_rules! regex {
@@ -208,6 +209,11 @@ fn main() -> anyhow::Result<()> {
         pins::add_ioc_pins_from_sdk(data_dir, chip)?;
     }
 
+    stopwatch.section("Handle TRGM MUX");
+    for chip in &mut chips {
+        trgmmux::add_trgmmux_from_sdk(data_dir, chip)?;
+    }
+
     stopwatch.section("Writing chip data");
     for chip in &chips {
         println!(

hpm-data-gen/src/trgmmux.rs

@@ -0,0 +1,69 @@
+//! parse trgm mux defines from sdk_code
+
+use std::{
+    collections::HashMap,
+    path::{Path, PathBuf},
+};
+
+pub fn add_trgmmux_from_sdk<P: AsRef<Path>>(
+    data_dir: P,
+    chip: &mut hpm_data_serde::Chip,
+) -> anyhow::Result<()> {
+    let sdk_path = std::env::var("HPM_SDK_BASE")
+        .map(PathBuf::from)
+        .unwrap_or_else(|_| data_dir.as_ref().parent().unwrap().join("hpm_sdk"));
+
+    let chip_name = &chip.name;
+
+    if chip.cores[0]
+        .peripherals
+        .iter()
+        .find(|p| p.name.starts_with("TRGM"))
+        .is_none()
+    {
+        return Ok(()); // No TRGM peripheral
+    }
+
+    let header_file = match chip_name {
+        n if n.starts_with("HPM53") => sdk_path.join("soc/HPM5300/HPM5361/hpm_trgmmux_src.h"),
+        n if n.starts_with("HPM62") => sdk_path.join("soc/HPM6200/HPM6280/hpm_trgmmux_src.h"),
+        n if n.starts_with("HPM63") => sdk_path.join("soc/HPM6300/HPM6360/hpm_trgmmux_src.h"),
+        n if n.starts_with("HPM67") || n.starts_with("HPM64") => {
+            sdk_path.join("soc/HPM6700/HPM6750/hpm_trgmmux_src.h")
+        }
+        n if n.starts_with("HPM6E") => sdk_path.join("soc/HPM6E00/HPM6E80/hpm_trgmmux_src.h"),
+        _ => anyhow::bail!("Unknown chip: {}", chip_name),
+    };
+
+    let content = std::fs::read_to_string(&header_file)
+        .expect(format!("Failed to read file: {:?}", &header_file).as_str());
+
+    // #define HPM_TRGM0_FILTER_SRC_PWM0_IN0                      (0x0UL)
+    let resource_pattern =
+        regex::Regex::new(r"#define\s+HPM_(TRGM\d_\w+)\s+\(0x([0-9A-Fa-f]+)UL\)")
+            .expect("Invalid regex");
+    let defines: HashMap<String, u32> = resource_pattern
+        .captures_iter(&content)
+        .map(|cap| {
+            (
+                cap.get(1).unwrap().as_str().to_string(),
+                u32::from_str_radix(cap.get(2).unwrap().as_str(), 16).unwrap(),
+            )
+        })
+        .collect();
+
+    println!("    Chip: {} TRGM consts: {}", chip_name, defines.len());
+
+    for core in &mut chip.cores {
+        core.trgmmuxes = defines
+            .iter()
+            .map(|(name, val)| hpm_data_serde::chip::core::TrgmMux {
+                name: name.clone(),
+                value: *val as _,
+            })
+            .collect();
+        core.resources.sort_by_key(|r| r.index);
+    }
+
+    Ok(())
+}

hpm-data-serde/src/lib.rs

@@ -73,6 +73,8 @@ pub mod chip {
         pub pins: Vec<core::IoPin>,
         #[serde(default)]
         pub iomuxes: Vec<core::IoMux>,
+        #[serde(default)]
+        pub trgmmuxes: Vec<core::TrgmMux>,
 
         // include fields, for common peripherals
         #[serde(skip_serializing_if = "Option::is_none")]
@@ -272,6 +274,13 @@ pub mod chip {
             // alt func value
             pub value: u8,
         }
+
+        #[derive(Clone, Debug, Eq, PartialEq, Hash, PartialOrd, Ord, Serialize, Deserialize)]
+        pub struct TrgmMux {
+            pub name: String,
+            // signal offset
+            pub value: u8,
+        }
     }
 }
 

hpm-metapac-gen/res/src/metadata.rs

@@ -132,6 +132,7 @@ pub struct Metadata {
     pub resources: &'static [Resource],
     pub clocks: &'static [Clock],
     pub pins: &'static [IoPin],
+    pub trgmmux: &'static [TrgmMux],
 }
 
 #[derive(Debug, Eq, PartialEq, Clone)]
@@ -152,6 +153,12 @@ pub struct IoPin {
     pub index: u32,
 }
 
+#[derive(Debug, Eq, PartialEq, Clone)]
+pub struct TrgmMux {
+    pub name: &'static str,
+    pub value: u32,
+}
+
 #[derive(Debug, Eq, PartialEq, Clone)]
 pub struct MemoryRegion {
     pub name: &'static str,

hpm-metapac-gen/src/data.rs

@@ -348,6 +348,8 @@ pub struct Core {
     pub pins: Vec<IoPin>,
     #[serde(default)]
     pub iomuxes: Vec<IoMux>,
+    #[serde(default)]
+    pub trgmmuxes: Vec<TrgmMux>,
 }
 
 #[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
@@ -372,6 +374,12 @@ pub struct IoMux {
     pub value: u32,
 }
 
+#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
+pub struct TrgmMux {
+    pub name: String,
+    pub value: u32,
+}
+
 #[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
 pub struct Interrupt {
     pub name: String,

hpm-metapac-gen/src/lib.rs

@@ -141,7 +141,7 @@ impl Gen {
         {
             // All SYSCTL resources
             writeln!(&mut extra, "pub mod resources {{").unwrap();
-            writeln!(&mut extra, "   //! `SYSCTL.RESOURCE` definitions").unwrap();
+            writeln!(&mut extra, "    //! `SYSCTL.RESOURCE` definitions").unwrap();
             for res in &core.resources {
                 writeln!(
                     &mut extra,
@@ -155,7 +155,7 @@ impl Gen {
 
             // All clocks
             writeln!(&mut extra, "pub mod clocks {{").unwrap();
-            writeln!(&mut extra, "   //! `SYSCTL.CLOCK` definitions").unwrap();
+            writeln!(&mut extra, "    //! `SYSCTL.CLOCK` definitions").unwrap();
             for clk in &core.clocks {
                 writeln!(
                     &mut extra,
@@ -169,7 +169,7 @@ impl Gen {
 
             // All pin pads
             writeln!(&mut extra, "pub mod pins {{").unwrap();
-            writeln!(&mut extra, "   //! Pin pad definitions").unwrap();
+            writeln!(&mut extra, "    //! Pin pad definitions").unwrap();
             for pin in &core.pins {
                 writeln!(
                     &mut extra,
@@ -183,7 +183,7 @@ impl Gen {
 
             // All iomux consts
             writeln!(&mut extra, "pub mod iomux {{").unwrap();
-            writeln!(&mut extra, "   //! `FUNC_CTL` function mux definitions").unwrap();
+            writeln!(&mut extra, "    //! `FUNC_CTL` function mux definitions").unwrap();
             for mux in &core.iomuxes {
                 writeln!(
                     &mut extra,
@@ -194,6 +194,20 @@ impl Gen {
                 .unwrap();
             }
             writeln!(&mut extra, "}}").unwrap();
+
+            // ALL TRGMMUX consts
+            writeln!(&mut extra, "pub mod trgmmux {{").unwrap();
+            writeln!(&mut extra, "    //! `TRGMMUX` definitions").unwrap();
+            for mux in &core.trgmmuxes {
+                writeln!(
+                    &mut extra,
+                    "    pub const {}: usize = {};",
+                    mux.name.to_ascii_uppercase(),
+                    mux.value
+                )
+                .unwrap();
+            }
+            writeln!(&mut extra, "}}").unwrap();
         }
 
         // Cleanups!
@@ -253,14 +267,15 @@ impl Gen {
                 pub(crate) static RESOURCES: &[Resource] = {};
                 pub(crate) static CLOCKS: &[Clock] = {};
                 pub(crate) static PINS: &[IoPin] = {};
-
+                pub(crate) static TRGMMUX: &[TrgmMux] = {};
             ",
             stringify(&core.peripherals),
             stringify(&core.interrupts),
             stringify(&core.dma_channels),
             stringify(&core.resources),
             stringify(&core.clocks),
             stringify(&core.pins),
+            stringify(&core.trgmmuxes),
         )
         .unwrap();
 
@@ -298,6 +313,7 @@ impl Gen {
                 resources: RESOURCES,
                 clocks: CLOCKS,
                 pins: PINS,
+                trgmmux: TRGMMUX,
             }};",
             deduped_file,
             &chip.name,