LLVM and SPIRV-LLVM-Translator pulldown (WW39)

LLVM: llvm/llvm-project@c43aa46
SPIRV-LLVM-Translator: KhronosGroup/SPIRV-LLVM-Translator@3d28e52

.github/new-prs-labeler.yml

@@ -40,15 +40,6 @@ lld:
 llvm-lit:
   - llvm/utils/lit/**/*
 
-mlir:afine:
-  - mlir/**/Affine/**/*
-
-mlir:python:
-  - mlir/python/**/*
-
-mlir:vectorops:
-  - mlir/**/Vector/**/*
-
 PGO:
   - llvm/lib/Transforms/Instrumentation/CGProfile.cpp
   - llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
@@ -90,6 +81,10 @@ compiler-rt:sanitizer:
   - compiler-rt/lib/scudo/**
   - compiler-rt/test/scudo/**
 
+compiler-rt:scudo:
+  - compiler-rt/lib/scudo/**
+  - compiler-rt/test/scudo/**
+
 xray:
   - llvm/tools/llvm-xray/**
   - compiler-rt/*/xray/**
@@ -259,6 +254,15 @@ mlir:vector:
 mlir:execution-engine:
   - mlir/**/ExecutionEngine/**
 
+mlir:presburger:
+  - mlir/**/*Presburger*/**
+
+mlir:python:
+  - mlir/python/**/*
+
+mlir:vectorops:
+  - mlir/**/Vector/**/*
+
 coroutines:
   - clang/docs/DebuggingCoroutines.rst
   - clang/lib/Sema/SemaCoroutine.cpp
@@ -633,9 +637,6 @@ llvm:regalloc:
   - llvm/include/llvm/CodeGen/Spiller.h
   - llvm/**/*RegAlloc
 
-mlir:presburger:
-  - mlir/**/*Presburger
-
 lldb:
   - lldb/**
 

.github/workflows/pr-code-format.yml

@@ -0,0 +1,54 @@
+name: "Check code formatting"
+on: pull_request_target
+permissions:
+  pull-requests: write
+
+jobs:
+  code_formatter:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Fetch LLVM sources
+        uses: actions/checkout@v4
+        with:
+          fetch-depth: 2
+
+      - name: Get changed files
+        id: changed-files
+        uses: tj-actions/changed-files@v39
+        with:
+          separator: ","
+          fetch_depth: 100 # Fetches only the last 10 commits
+
+      - name: "Listed files"
+        run: |
+          echo "Formatting files:"
+          echo "${{ steps.changed-files.outputs.all_changed_files }}"
+
+      - name: Install clang-format
+        uses: aminya/setup-cpp@v1
+        with:
+          clangformat: 17.0.1
+
+      - name: Setup Python env
+        uses: actions/setup-python@v4
+        with:
+          python-version: '3.11'
+          cache: 'pip'
+          cache-dependency-path: 'llvm/utils/git/requirements_formatting.txt'
+
+      - name: Install python dependencies
+        run: pip install -r llvm/utils/git/requirements_formatting.txt
+
+      - name: Run code formatter
+        env:
+          GITHUB_PR_NUMBER: ${{ github.event.pull_request.number }}
+          START_REV: ${{ github.event.pull_request.base.sha }}
+          END_REV: ${{ github.event.pull_request.head.sha }}
+          CHANGED_FILES: ${{ steps.changed-files.outputs.all_changed_files }}
+        run: |
+          python llvm/utils/git/code-format-helper.py \
+            --token ${{ secrets.GITHUB_TOKEN }} \
+            --issue-number $GITHUB_PR_NUMBER \
+            --start-rev $START_REV \
+            --end-rev $END_REV \
+            --changed-files "$CHANGED_FILES"

.github/workflows/pr-receive.yml

@@ -3,6 +3,11 @@
 name: PR Receive
 on:
   pull_request_target:
+    types:
+      - opened
+      - reopened
+      - ready_for_review
+      - synchronize
 
 permissions:
   contents: read
@@ -15,6 +20,7 @@ jobs:
     # to rebase.  We want to ignore these pull requests to avoid excessive
     # notifications.
     if: github.repository == 'llvm/llvm-project' &&
+        github.event.pull_request.draft == false &&
         github.event.pull_request.commits < 10
     steps:
       - name: Store PR Information

.github/workflows/release-tasks.yml

@@ -24,21 +24,19 @@ jobs:
           release_version=$(echo "${{ github.ref_name }}" | sed 's/llvmorg-//g')
           echo "release-version=$release_version" >> "$GITHUB_OUTPUT"
 
+      - name: Checkout LLVM
+        uses: actions/checkout@v4
+
       - name: Install Dependencies
         run: |
           sudo apt-get update
           sudo apt-get install -y \
               doxygen \
               graphviz \
               python3-github \
-              python3-recommonmark \
-              python3-sphinx \
               ninja-build \
               texlive-font-utils
-          pip3 install --user sphinx-markdown-tables
-
-      - name: Checkout LLVM
-        uses: actions/checkout@v4
+          pip3 install --user -r ./llvm/docs/requirements.txt
 
       - name: Create Release
         run: |
@@ -83,13 +81,24 @@ jobs:
       - name: Checkout LLVM
         uses: actions/checkout@v4
 
+      - name: Setup Cpp
+        uses: aminya/setup-cpp@v1
+        with:
+          compiler: llvm-16.0.6
+          cmake: true
+          ninja: true
+
       - name: Install dependencies
-        run: sudo apt-get install -y python3-setuptools
+        run: |
+          sudo apt-get update
+          sudo apt-get install -y python3-setuptools python3-psutil
 
       - name: Test lit
         run: |
-          cd llvm/utils/lit
-          python3 lit.py tests
+          mkdir build && cd build
+          export FILECHECK_OPTS='-dump-input-filter=all -vv -color'
+          cmake ../llvm -DCMAKE_BUILD_TYPE=Release -G Ninja
+          ninja -v -j $(nproc) check-lit
 
       - name: Package lit
         run: |

bolt/include/bolt/Core/MCPlusBuilder.h

@@ -29,6 +29,7 @@
 #include "llvm/Support/Allocator.h"
 #include "llvm/Support/ErrorHandling.h"
 #include "llvm/Support/ErrorOr.h"
+#include "llvm/Support/RWMutex.h"
 #include <cassert>
 #include <cstdint>
 #include <map>
@@ -166,6 +167,10 @@ class MCPlusBuilder {
   /// Names of non-standard annotations.
   SmallVector<std::string, 8> AnnotationNames;
 
+  /// A mutex that is used to control parallel accesses to
+  /// AnnotationNameIndexMap and AnnotationsNames.
+  mutable llvm::sys::RWMutex AnnotationNameMutex;
+
   /// Allocate the TailCall annotation value. Clients of the target-specific
   /// MCPlusBuilder classes must use convert/lower/create* interfaces instead.
   void setTailCall(MCInst &Inst);
@@ -621,6 +626,11 @@ class MCPlusBuilder {
     return Info->get(Inst.getOpcode()).mayStore();
   }
 
+  virtual bool isAArch64Exclusive(const MCInst &Inst) const {
+    llvm_unreachable("not implemented");
+    return false;
+  }
+
   virtual bool isCleanRegXOR(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;
@@ -1775,6 +1785,7 @@ class MCPlusBuilder {
 
   /// Return annotation index matching the \p Name.
   std::optional<unsigned> getAnnotationIndex(StringRef Name) const {
+    std::shared_lock<llvm::sys::RWMutex> Lock(AnnotationNameMutex);
     auto AI = AnnotationNameIndexMap.find(Name);
     if (AI != AnnotationNameIndexMap.end())
       return AI->second;
@@ -1784,10 +1795,10 @@ class MCPlusBuilder {
   /// Return annotation index matching the \p Name. Create a new index if the
   /// \p Name wasn't registered previously.
   unsigned getOrCreateAnnotationIndex(StringRef Name) {
-    auto AI = AnnotationNameIndexMap.find(Name);
-    if (AI != AnnotationNameIndexMap.end())
-      return AI->second;
+    if (std::optional<unsigned> Index = getAnnotationIndex(Name))
+      return *Index;
 
+    std::unique_lock<llvm::sys::RWMutex> Lock(AnnotationNameMutex);
     const unsigned Index =
         AnnotationNameIndexMap.size() + MCPlus::MCAnnotation::kGeneric;
     AnnotationNameIndexMap.insert(std::make_pair(Name, Index));

bolt/lib/Core/Relocation.cpp

@@ -106,6 +106,10 @@ static bool isSupportedRISCV(uint64_t Type) {
   case ELF::R_RISCV_RVC_BRANCH:
   case ELF::R_RISCV_ADD32:
   case ELF::R_RISCV_SUB32:
+  case ELF::R_RISCV_HI20:
+  case ELF::R_RISCV_LO12_I:
+  case ELF::R_RISCV_LO12_S:
+  case ELF::R_RISCV_64:
     return true;
   }
 }
@@ -202,7 +206,11 @@ static size_t getSizeForTypeRISCV(uint64_t Type) {
   case ELF::R_RISCV_CALL_PLT:
   case ELF::R_RISCV_ADD32:
   case ELF::R_RISCV_SUB32:
+  case ELF::R_RISCV_HI20:
+  case ELF::R_RISCV_LO12_I:
+  case ELF::R_RISCV_LO12_S:
     return 4;
+  case ELF::R_RISCV_64:
   case ELF::R_RISCV_GOT_HI20:
     // See extractValueRISCV for why this is necessary.
     return 8;
@@ -358,6 +366,16 @@ static uint64_t encodeValueAArch64(uint64_t Type, uint64_t Value, uint64_t PC) {
   return Value;
 }
 
+static uint64_t encodeValueRISCV(uint64_t Type, uint64_t Value, uint64_t PC) {
+  switch (Type) {
+  default:
+    llvm_unreachable("unsupported relocation");
+  case ELF::R_RISCV_64:
+    break;
+  }
+  return Value;
+}
+
 static uint64_t extractValueX86(uint64_t Type, uint64_t Contents, uint64_t PC) {
   if (Type == ELF::R_X86_64_32S)
     return SignExtend64<32>(Contents);
@@ -519,17 +537,21 @@ static uint64_t extractValueRISCV(uint64_t Type, uint64_t Contents,
     return extractUImmRISCV(Contents & 0xffffffff) +
            extractIImmRISCV(Contents >> 32);
   case ELF::R_RISCV_PCREL_HI20:
+  case ELF::R_RISCV_HI20:
     return extractUImmRISCV(Contents);
   case ELF::R_RISCV_PCREL_LO12_I:
+  case ELF::R_RISCV_LO12_I:
     return extractIImmRISCV(Contents);
   case ELF::R_RISCV_PCREL_LO12_S:
+  case ELF::R_RISCV_LO12_S:
     return extractSImmRISCV(Contents);
   case ELF::R_RISCV_RVC_JUMP:
     return SignExtend64<11>(Contents >> 2);
   case ELF::R_RISCV_RVC_BRANCH:
     return SignExtend64<8>(((Contents >> 2) & 0x1f) | ((Contents >> 5) & 0xe0));
   case ELF::R_RISCV_ADD32:
   case ELF::R_RISCV_SUB32:
+  case ELF::R_RISCV_64:
     return Contents;
   }
 }
@@ -692,6 +714,10 @@ static bool isPCRelativeRISCV(uint64_t Type) {
     llvm_unreachable("Unknown relocation type");
   case ELF::R_RISCV_ADD32:
   case ELF::R_RISCV_SUB32:
+  case ELF::R_RISCV_HI20:
+  case ELF::R_RISCV_LO12_I:
+  case ELF::R_RISCV_LO12_S:
+  case ELF::R_RISCV_64:
     return false;
   case ELF::R_RISCV_JAL:
   case ELF::R_RISCV_CALL:
@@ -744,7 +770,7 @@ uint64_t Relocation::encodeValue(uint64_t Type, uint64_t Value, uint64_t PC) {
   if (Arch == Triple::aarch64)
     return encodeValueAArch64(Type, Value, PC);
   if (Arch == Triple::riscv64)
-    llvm_unreachable("not implemented");
+    return encodeValueRISCV(Type, Value, PC);
   return encodeValueX86(Type, Value, PC);
 }
 
@@ -832,6 +858,8 @@ bool Relocation::isPCRelative(uint64_t Type) {
 uint64_t Relocation::getAbs64() {
   if (Arch == Triple::aarch64)
     return ELF::R_AARCH64_ABS64;
+  if (Arch == Triple::riscv64)
+    return ELF::R_RISCV_64;
   return ELF::R_X86_64_64;
 }