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[ARM] Distribute shifts as muls #7790

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merged 9 commits into from
Aug 24, 2023
Merged

[ARM] Distribute shifts as muls #7790

merged 9 commits into from
Aug 24, 2023

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rootjalex
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ARM/LLVM currently lowers a + widening_shl(b, c) into (u | s)shll and add, this PR lowers it to (u | s)mlal. I reused HVX machinery for the distribution, DistributeShiftsAsMuls. HVX lowering is not expected to change at all.

@rootjalex rootjalex requested a review from abadams August 21, 2023 20:22
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@steven-johnson steven-johnson left a comment

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Nice to have it factored into common code; I suspect that RISC-V will (eventually) benefit from something similar

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abadams commented Aug 22, 2023

There's a nifty clang tidy failure

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abadams commented Aug 22, 2023

lgtm pending green bots

@rootjalex
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The find_intrinsics rule that helps with mixed-sign widening_shift_left appears to have broken simd_op_check_hvx, so I am reverting it. This was to handle cases like:

i16_1 + i16(u8_2) * 2 -> umlal

@pranavb-ca I'd be happy to hear if you have any ideas about fixing this. I think the particular issue was that 2 * (i16(u8_1) + i16(u8_2)) got mapped to 2 vmpys with the change, where it used to be 1 vmpa.

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Failures appear unrelated

@rootjalex rootjalex merged commit 88c75ec into main Aug 24, 2023
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@rootjalex rootjalex deleted the rootjalex/arm-mlal branch August 24, 2023 17:31
ardier pushed a commit to ardier/Halide-mutation that referenced this pull request Mar 3, 2024
* [ARM] distribute shifts as muls

This reverts commit eba8f32.

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Co-authored-by: Steven Johnson <[email protected]>
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3 participants