mmc: host: sdhci: Allow use of controller's native max blocksize [TBV]

Currently, any controller supporting a blocksize of 4K or higher
is bumped back down to 512 bytes. This change allows using the
controller's native blocksize on a per-hardware basis.

[XXX: verify]

drivers/mmc/host/Kconfig

@@ -89,6 +89,17 @@ config MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
 
 	  This is the case for the Nintendo Wii SDHCI.
 
+config MMC_SDHCI_NATIVE_BLOCKSIZE
+	bool "Use Host Controller's actual blocksize"
+	depends on MMC_SDHCI
+	default n
+	help
+	  Normally, the SDHCI host controller will limit the xfer blocksize
+	  to 512 bytes, even if the hardware host controller can do more.
+	  This option uses the maximum blocksize supported by the hardware.
+
+	  I have seen no corruption on a Tegra2, but if unsure, say N.
+
 config MMC_SDHCI_PCI
 	tristate "SDHCI support on PCI bus"
 	depends on MMC_SDHCI && PCI

drivers/mmc/host/sdhci.c

@@ -4611,11 +4611,13 @@ int sdhci_setup_host(struct sdhci_host *host)
 	} else {
 		mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >>
 				SDHCI_MAX_BLOCK_SHIFT;
+#ifndef CONFIG_MMC_SDHCI_NATIVE_BLOCKSIZE
 		if (mmc->max_blk_size >= 3) {
 			pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n",
 				mmc_hostname(mmc));
 			mmc->max_blk_size = 0;
 		}
+#endif
 	}
 
 	mmc->max_blk_size = 512 << mmc->max_blk_size;
@@ -4629,6 +4631,11 @@ int sdhci_setup_host(struct sdhci_host *host)
 		/* This may alter mmc->*_blk_* parameters */
 		sdhci_allocate_bounce_buffer(host);
 
+#ifdef CONFIG_MMC_SDHCI_NATIVE_BLOCKSIZE
+	printk(KERN_INFO "%s: mss %u mrs %u mbs %u mbc %u\n", mmc_hostname(mmc),
+		mmc->max_seg_size, mmc->max_req_size, mmc->max_blk_size,
+		mmc->max_blk_count);
+#endif
 	return 0;
 
 unreg: