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[GR-20608] Export _has_intel_jcc_erratum.
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PullRequest: graal-jvmci-8/263
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mur47x111 committed Feb 17, 2020
2 parents 6cb16d4 + 8043db0 commit 52a7245
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Showing 3 changed files with 74 additions and 2 deletions.
3 changes: 1 addition & 2 deletions src/cpu/x86/vm/vmStructs_x86.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -38,10 +38,9 @@
/* JavaFrameAnchor */ \
/******************************/ \
volatile_nonstatic_field(JavaFrameAnchor, _last_Java_fp, intptr_t*) \
static_field(VM_Version, _has_intel_jcc_erratum, bool) \
static_field(VM_Version, _cpuFeatures, int)



#define VM_TYPES_CPU(declare_type, declare_toplevel_type, declare_oop_type, declare_integer_type, declare_unsigned_integer_type, declare_c1_toplevel_type, declare_c2_type, declare_c2_toplevel_type) \
declare_toplevel_type(VM_Version)

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68 changes: 68 additions & 0 deletions src/cpu/x86/vm/vm_version_x86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -47,6 +47,8 @@ int VM_Version::_cpu;
int VM_Version::_model;
int VM_Version::_stepping;
int VM_Version::_cpuFeatures;
bool VM_Version::_has_intel_jcc_erratum;

const char* VM_Version::_features_str = "";
VM_Version::CpuidInfo VM_Version::_cpuid_info = { 0, };

Expand Down Expand Up @@ -495,6 +497,8 @@ void VM_Version::get_processor_features() {
_cpuFeatures &= ~CPU_HT;
}

_has_intel_jcc_erratum = compute_has_intel_jcc_erratum();

char buf[256];
jio_snprintf(buf, sizeof(buf), "(%u cores per cpu, %u threads per core) family %d model %d stepping %d%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
cores_per_cpu(), threads_per_core(),
Expand Down Expand Up @@ -1140,6 +1144,70 @@ bool VM_Version::use_biased_locking() {
return UseBiasedLocking;
}

bool VM_Version::compute_has_intel_jcc_erratum() {
if (!is_intel_family_core()) {
// Only Intel CPUs are affected.
return false;
}
// The following table of affected CPUs is based on the following document released by Intel:
// https://www.intel.com/content/dam/support/us/en/documents/processors/mitigations-jump-conditional-code-erratum.pdf
switch (_model) {
case 0x8E:
// 06_8EH | 9 | 8th Generation Intel Core Processor Family based on microarchitecture code name Amber Lake Y
// 06_8EH | 9 | 7th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake U
// 06_8EH | 9 | 7th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake U 23e
// 06_8EH | 9 | 7th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake Y
// 06_8EH | A | 8th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake U43e
// 06_8EH | B | 8th Generation Intel Core Processors based on microarchitecture code name Whiskey Lake U
// 06_8EH | C | 8th Generation Intel Core Processor Family based on microarchitecture code name Amber Lake Y
// 06_8EH | C | 10th Generation Intel Core Processor Family based on microarchitecture code name Comet Lake U42
// 06_8EH | C | 8th Generation Intel Core Processors based on microarchitecture code name Whiskey Lake U
return _stepping == 0x9 || _stepping == 0xA || _stepping == 0xB || _stepping == 0xC;
case 0x4E:
// 06_4E | 3 | 6th Generation Intel Core Processors based on microarchitecture code name Skylake U
// 06_4E | 3 | 6th Generation Intel Core Processor Family based on microarchitecture code name Skylake U23e
// 06_4E | 3 | 6th Generation Intel Core Processors based on microarchitecture code name Skylake Y
return _stepping == 0x3;
case 0x55:
// 06_55H | 4 | Intel Xeon Processor D Family based on microarchitecture code name Skylake D, Bakerville
// 06_55H | 4 | Intel Xeon Scalable Processors based on microarchitecture code name Skylake Server
// 06_55H | 4 | Intel Xeon Processor W Family based on microarchitecture code name Skylake W
// 06_55H | 4 | Intel Core X-series Processors based on microarchitecture code name Skylake X
// 06_55H | 4 | Intel Xeon Processor E3 v5 Family based on microarchitecture code name Skylake Xeon E3
// 06_55 | 7 | 2nd Generation Intel Xeon Scalable Processors based on microarchitecture code name Cascade Lake (server)
return _stepping == 0x4 || _stepping == 0x7;
case 0x5E:
// 06_5E | 3 | 6th Generation Intel Core Processor Family based on microarchitecture code name Skylake H
// 06_5E | 3 | 6th Generation Intel Core Processor Family based on microarchitecture code name Skylake S
return _stepping == 0x3;
case 0x9E:
// 06_9EH | 9 | 8th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake G
// 06_9EH | 9 | 7th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake H
// 06_9EH | 9 | 7th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake S
// 06_9EH | 9 | Intel Core X-series Processors based on microarchitecture code name Kaby Lake X
// 06_9EH | 9 | Intel Xeon Processor E3 v6 Family Kaby Lake Xeon E3
// 06_9EH | A | 8th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake H
// 06_9EH | A | 8th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake S
// 06_9EH | A | 8th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake S (6+2) x/KBP
// 06_9EH | A | Intel Xeon Processor E Family based on microarchitecture code name Coffee Lake S (6+2)
// 06_9EH | A | Intel Xeon Processor E Family based on microarchitecture code name Coffee Lake S (4+2)
// 06_9EH | B | 8th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake S (4+2)
// 06_9EH | B | Intel Celeron Processor G Series based on microarchitecture code name Coffee Lake S (4+2)
// 06_9EH | D | 9th Generation Intel Core Processor Family based on microarchitecturecode name Coffee Lake H (8+2)
// 06_9EH | D | 9th Generation Intel Core Processor Family based on microarchitecture code name Coffee Lake S (8+2)
return _stepping == 0x9 || _stepping == 0xA || _stepping == 0xB || _stepping == 0xD;
case 0xA6:
// 06_A6H | 0 | 10th Generation Intel Core Processor Family based on microarchitecture code name Comet Lake U62
return _stepping == 0x0;
case 0xAE:
// 06_AEH | A | 8th Generation Intel Core Processor Family based on microarchitecture code name Kaby Lake Refresh U (4+2)
return _stepping == 0xA;
default:
// If we are running on another intel machine not recognized in the table, we are okay.
return false;
}
}

void VM_Version::initialize() {
ResourceMark rm;
// Making this stub must be FIRST use of assembler
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5 changes: 5 additions & 0 deletions src/cpu/x86/vm/vm_version_x86.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -230,6 +230,9 @@ class VM_Version : public Abstract_VM_Version {
static int _cpu;
static int _model;
static int _stepping;

static bool _has_intel_jcc_erratum;

static int _cpuFeatures; // features returned by the "cpuid" instruction
// 0 if this instruction is not available
static const char* _features_str;
Expand Down Expand Up @@ -405,6 +408,8 @@ class VM_Version : public Abstract_VM_Version {
return result;
}

static bool compute_has_intel_jcc_erratum();

static uint32_t feature_flags() {
uint32_t result = 0;
if (_cpuid_info.std_cpuid1_edx.bits.cmpxchg8 != 0)
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