Skip to content

Commit

Permalink
Add RAM cache attribute to ISR
Browse files Browse the repository at this point in the history
Required starting with ESP8266 board package 2.5.1

esp8266/Arduino#5995
  • Loading branch information
gdsports committed Jun 19, 2019
1 parent 900b8f9 commit f6a7ef7
Showing 1 changed file with 1 addition and 1 deletion.
Original file line number Diff line number Diff line change
Expand Up @@ -146,7 +146,7 @@ const unsigned int outPort = 9999; // remote port to receive OSC
// ================================================================

volatile bool mpuInterrupt = false; // indicates whether MPU interrupt pin has gone high
void dmpDataReady() {
void ICACHE_RAM_ATTR dmpDataReady() {
mpuInterrupt = true;
}

Expand Down

0 comments on commit f6a7ef7

Please sign in to comment.