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Use FullRange for SynExceptionDefnRepr, SynExceptionSig and SynModuleSigDecl. #1978

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29 changes: 29 additions & 0 deletions src/Fantomas.Tests/SignatureTests.fs
Original file line number Diff line number Diff line change
Expand Up @@ -1682,3 +1682,32 @@ type FooBar =
[<Literal>]
abstract member parenGet: string = ".()"
"""

[<Test>]
let ``trivia before exception with attributes, 1974`` () =
formatSourceString
true
"""
module internal FSharp.Compiler.ParseHelpers

open FSharp.Compiler.AbstractIL.IL


/// The error raised by the parse_error_rich function, which is called by the parser engine
[<NoEquality; NoComparison>]
exception SyntaxError of obj * range: range
"""
config
|> prepend newline
|> should
equal
"""
module internal FSharp.Compiler.ParseHelpers

open FSharp.Compiler.AbstractIL.IL


/// The error raised by the parse_error_rich function, which is called by the parser engine
[<NoEquality; NoComparison>]
exception SyntaxError of obj * range: range
"""
23 changes: 23 additions & 0 deletions src/Fantomas/AstExtensions.fs
Original file line number Diff line number Diff line change
Expand Up @@ -45,3 +45,26 @@ type SynField with
| SynField(attributes = []) -> None
| SynField (attributes = _ :: _; idOpt = None) -> None
| SynField (attributes = attrs; idOpt = Some ident) -> hasLinesBetweenAttributesAndFirstNode attrs ident.idRange

// TODO: Remove when https://github.com/dotnet/fsharp/pull/12441 is part of FCS
type SynExceptionDefnRepr with
member this.FullRange: range =
match this with
| SynExceptionDefnRepr (attributes = attrs; range = m) ->
match attrs with
| h :: _ -> mkRange m.FileName h.Range.Start m.End
| _ -> m

type SynExceptionSig with
member this.FullRange: range =
match this with
| SynExceptionSig (exnRepr = exnRepr; members = members; range = m) ->
match List.tryLast members with
| Some lastMember -> mkRange m.FileName exnRepr.FullRange.Start lastMember.Range.End
| None -> exnRepr.FullRange

type SynModuleSigDecl with
member this.FullRange: Range =
match this with
| SynModuleSigDecl.Exception (SynExceptionSig _ as ses, _) -> ses.FullRange
| _ -> this.Range
18 changes: 12 additions & 6 deletions src/Fantomas/AstTransformer.fs
Original file line number Diff line number Diff line change
Expand Up @@ -1088,8 +1088,10 @@ module private Ast =

and visitSynExceptionDefnRepr (sedr: SynExceptionDefnRepr) : TriviaNodeAssigner list =
match sedr with
| SynExceptionDefnRepr (attrs, unionCase, _, _, _, range) ->
[ yield mkNode SynExceptionDefnRepr_ range
| SynExceptionDefnRepr (attrs, unionCase, _, _, _, _range) ->
let fullRange = sedr.FullRange

[ yield mkNode SynExceptionDefnRepr_ fullRange
yield! (visitSynAttributeLists attrs)
yield! visitSynUnionCase unionCase ]

Expand Down Expand Up @@ -1376,17 +1378,21 @@ module private Ast =
| SynModuleSigDecl.NamespaceFragment moduleOrNamespace ->
visitSynModuleOrNamespaceSig moduleOrNamespace
|> finalContinuation
| SynModuleSigDecl.Exception (synExceptionSig, range) ->
mkNode SynModuleSigDecl_Exception range
| SynModuleSigDecl.Exception (synExceptionSig, _range) ->
let fullRange = ast.FullRange

mkNode SynModuleSigDecl_Exception fullRange
:: (visitSynExceptionSig synExceptionSig)
|> finalContinuation

visit ast id

and visitSynExceptionSig (exceptionDef: SynExceptionSig) : TriviaNodeAssigner list =
match exceptionDef with
| SynExceptionSig (sedr, members, range) ->
[ yield mkNode SynExceptionSig_ range
| SynExceptionSig (sedr, members, _range) ->
let fullRange = exceptionDef.FullRange

[ yield mkNode SynExceptionSig_ fullRange
yield! visitSynExceptionDefnRepr sedr
yield! (members |> List.collect visitSynMemberSig) ]

Expand Down
4 changes: 2 additions & 2 deletions src/Fantomas/CodePrinter.fs
Original file line number Diff line number Diff line change
Expand Up @@ -268,7 +268,7 @@ and genSigModuleDeclList astContext (e: SynModuleSigDecl list) =
|> finalContinuation)
| s :: rest ->
let sepNln =
sepNlnConsideringTriviaContentBeforeForMainNode (synModuleSigDeclToFsAstType s) s.Range
sepNlnConsideringTriviaContentBeforeForMainNode (synModuleSigDeclToFsAstType s) s.FullRange

let expr = genSigModuleDecl astContext s

Expand Down Expand Up @@ -433,7 +433,7 @@ and genSigModuleDecl astContext node =
| SynModuleSigDecl.Open (SynOpenDeclTarget.ModuleOrNamespace _, _) ->
genTriviaFor SynModuleSigDecl_Open node.Range
| SynModuleSigDecl.Open (SynOpenDeclTarget.Type _, _) -> genTriviaFor SynModuleSigDecl_OpenType node.Range
| SynModuleSigDecl.Exception _ -> genTriviaFor SynModuleSigDecl_Exception node.Range
| SynModuleSigDecl.Exception _ -> genTriviaFor SynModuleSigDecl_Exception node.FullRange
| _ -> id)

and genAccess (Access s) = !-s
Expand Down