Intrng: adjusting pic_init_secondary for further use cases

sys/arm/arm/gic.c

@@ -205,6 +205,13 @@ arm_gic_init_secondary(device_t dev, uint32_t rootnum)
 	struct arm_gic_softc *sc = device_get_softc(dev);
 	u_int irq, cpu;
 
+	if (rootnum >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	/* Set the mask so we can find this CPU to send it IPIs */
 	cpu = PCPU_GET(cpuid);
 	MPASS(cpu < GIC_MAXCPU);

sys/arm/broadcom/bcm2835/bcm2836.c

@@ -543,6 +543,13 @@ bcm_lintc_init_secondary(device_t dev, uint32_t rootnum)
 	u_int cpu;
 	struct bcm_lintc_softc *sc;
 
+	if (rootnum >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	cpu = PCPU_GET(cpuid);
 	sc = device_get_softc(dev);
 

sys/arm64/arm64/gic_v3.c

@@ -1103,6 +1103,13 @@ gic_v3_init_secondary(device_t dev, uint32_t rootnum)
 	u_int cpu, irq;
 	int err, i;
 
+	if (rootnum >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	sc = device_get_softc(dev);
 	cpu = PCPU_GET(cpuid);
 

sys/arm64/arm64/gicv3_its.c

@@ -1297,6 +1297,13 @@ gicv3_its_init_secondary(device_t dev, uint32_t rootnum)
 {
 	struct gicv3_its_softc *sc;
 
+	if (rootnum >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	sc = device_get_softc(dev);
 
 	/*

sys/kern/subr_intr.c

@@ -1570,19 +1570,20 @@ dosoftints(void)
 void
 intr_pic_init_secondary(void)
 {
+	struct intr_pic *pic;
 	device_t dev;
 	uint32_t rootnum;
 
-	/*
-	 * QQQ: Only root PICs are aware of other CPUs ???
-	 */
 	//mtx_lock(&isrc_table_lock);
 	for (rootnum = 0; rootnum < INTR_ROOT_COUNT; rootnum++) {
 		dev = intr_irq_roots[rootnum].dev;
 		if (dev != NULL) {
 			PIC_INIT_SECONDARY(dev, rootnum);
 		}
 	}
+
+	SLIST_FOREACH(pic, &pic_list, pic_next)
+		PIC_INIT_SECONDARY(pic->pic_dev, INTR_ROOT_COUNT);
 	//mtx_unlock(&isrc_table_lock);
 }
 #endif

sys/riscv/riscv/intc.c

@@ -247,9 +247,16 @@
 	struct intr_irqsrc *isrc;
 	u_int cpu, irq;
 
+	if (rootnum >= INTR_ROOT_COUNT) {
+		/*
+		 * Per-processor setup for devices with PPI interrupts?
+		 */
+		return;
+	}
+
 	sc = device_get_softc(dev);
 	cpu = PCPU_GET(cpuid);
 
 	/* Unmask attached interrupts */
 	for (irq = 0; irq < INTC_NIRQS; irq++) {
 		isrc = &sc->isrcs[irq].isrc;