Enable color threshold and passthrough reference design tests in hw (X…

…ilinx#856)
fifield · Dec 12, 2023 · 2f414c7 · 2f414c7
1 parent 546bf08
commit 2f414c7
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Showing 5 changed files with 36 additions and 23 deletions.
diff --git a/reference_designs/ipu-xrt/vision_pipelines/color_threshold/run.lit b/reference_designs/ipu-xrt/vision_pipelines/color_threshold/run.lit
@@ -1,6 +1,11 @@
 // (c) Copyright 2023 Advanced Micro Devices, Inc.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
-// RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/../vision_kernels/threshold.cc -o ./threshold.o
-// RUN: %python %S/aie2_colorThreshold.py > ./aie.mlir
-// RUN: %python aiecc.py --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=final.xclbin --ipu-insts-name=insts.txt ./aie.mlir
+// REQUIRES: ryzen_ai, opencv
+//
+// RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/../vision_kernels/threshold.cc -o ./threshold.cc.o
+// RUN: %python %S/aie2_colorThreshold.py 128 8 > ./aie.mlir
+// RUN: %python aiecc.py --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=aie.xclbin --ipu-insts-name=insts.txt ./aie.mlir
+// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall -DCOLORTHRESHOLD_WIDTH=128 -DCOLORTHRESHOLD_HEIGHT=8 -I%S/../../../utils %S/../../../utils/xrtUtils.cpp %S/../../../utils/OpenCVUtils.cpp %xrt_flags %opencv_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem
+// RUN: %run_on_ipu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s
+// CHECK: PASS!
diff --git a/reference_designs/ipu-xrt/vision_pipelines/color_threshold/test.cpp b/reference_designs/ipu-xrt/vision_pipelines/color_threshold/test.cpp
@@ -165,28 +165,30 @@ int main(int argc, const char *argv[]) {
     if (srcVec[i] <= 50) { // Obviously change this back to 100
       if (*(bufOut + i) != 0) {
         if (errors < max_errors)
-          std::cout << "Error: " << (uint8_t) * (bufOut + i) << " at " << i
-                    << " should be zero "
-                    << " : input " << std::dec << (uint8_t)srcVec[i]
+          std::cout << "Error: " << (uint32_t)(uint8_t) * (bufOut + i) << " at "
+                    << i << " should be zero "
+                    << " : input " << std::dec << (uint32_t)(uint8_t)srcVec[i]
                     << std::endl;
         errors++;
       } else {
-        std::cout << "Below threshold:   " << (uint8_t) * (bufOut + i) << " at "
-                  << i << " is correct "
-                  << " : input " << std::dec << (uint8_t)srcVec[i] << std::endl;
+        std::cout << "Below threshold:   " << (uint32_t)(uint8_t) * (bufOut + i)
+                  << " at " << i << " is correct "
+                  << " : input " << std::dec << (uint32_t)(uint8_t)srcVec[i]
+                  << std::endl;
       }
     } else {
       if (*(bufOut + i) != UINT8_MAX) {
         if (errors < max_errors)
-          std::cout << "Error: " << (uint8_t) * (bufOut + i) << " at " << i
-                    << " should be UINT8_MAX "
-                    << " : input " << std::dec << (uint8_t)srcVec[i]
+          std::cout << "Error: " << (uint32_t)(uint8_t) * (bufOut + i) << " at "
+                    << i << " should be UINT8_MAX "
+                    << " : input " << std::dec << (uint32_t)(uint8_t)srcVec[i]
                     << std::endl;
         errors++;
       } else {
-        std::cout << "Above threshold:  " << (uint8_t) * (bufOut + i) << " at "
-                  << i << " is correct "
-                  << " : input " << std::dec << (uint8_t)srcVec[i] << std::endl;
+        std::cout << "Above threshold:  " << (uint32_t)(uint8_t) * (bufOut + i)
+                  << " at " << i << " is correct "
+                  << " : input " << std::dec << (uint32_t)(uint8_t)srcVec[i]
+                  << std::endl;
       }
     }
   }

diff --git a/reference_designs/ipu-xrt/vision_pipelines/passthrough/run.lit b/reference_designs/ipu-xrt/vision_pipelines/passthrough/run.lit
@@ -1,6 +1,11 @@
 // (c) Copyright 2023 Advanced Micro Devices, Inc.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
-// RUN: xchesscc_wrapper aie2 -I %aietools/include -c %S/../vision_kernels/passThrough.cc -o ./passThrough.cc.o
-// RUN: %python %S/aie2.py > ./aie.mlir
-// RUN: %python aiecc.py --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=final.xclbin --ipu-insts-name=insts.txt ./aie.mlir
+// REQUIRES: ryzen_ai, opencv
+//
+// RUN: xchesscc_wrapper aie2 -I %aietools/include -DBIT_WIDTH=8 -c %S/../vision_kernels/passThrough.cc -o passThrough.cc.o
+// RUN: %python %S/aie2.py 1024 8 | aie-opt -cse -canonicalize -o ./aie.mlir
+// RUN: %python aiecc.py --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=aie.xclbin --ipu-insts-name=insts.txt ./aie.mlir
+// RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall -DPASSTHROUGH_WIDTH=1024 -DPASSTHROUGH_HEIGHT=8 -I%S/../../../utils %S/../../../utils/xrtUtils.cpp %S/../../../utils/OpenCVUtils.cpp %xrt_flags %opencv_flags  -lrt -lstdc++ -lboost_program_options -lboost_filesystem
+// RUN: %run_on_ipu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s
+// CHECK: PASS!
diff --git a/test/ipu-xrt/add_one_objFifo/run.lit b/test/ipu-xrt/add_one_objFifo/run.lit
@@ -3,6 +3,7 @@
 //
 // REQUIRES: ryzen_ai
 //
-// RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=final.xclbin --ipu-insts-name=insts.txt %S/aie.mlir
+// RUN: %python aiecc.py --no-aiesim --aie-generate-cdo --aie-generate-ipu --no-compile-host --xclbin-name=aie.xclbin --ipu-insts-name=insts.txt %S/aie.mlir
 // RUN: clang %S/test.cpp -o test.exe -std=c++11 -Wall %xrt_flags -lrt -lstdc++ -lboost_program_options -lboost_filesystem
-// RUN: %run_on_ipu ./test.exe -x final.xclbin -k MLIR_AIE -i insts.txt
+// RUN: %run_on_ipu ./test.exe -x aie.xclbin -k MLIR_AIE -i insts.txt | FileCheck %s
+// CHECK: PASS!
diff --git a/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir b/test/unit_tests/chess_compiler_tests/04_shared_memory/aie_row.mlir
@@ -23,7 +23,7 @@ module @test4_row_shared_memory {
 
   %buf13_0 = AIE.buffer(%tile23) { sym_name = "a" } : memref<256xi32>
   %buf13_1 = AIE.buffer(%tile23) { sym_name = "b" } : memref<256xi32>
-  %buf23_0 = AIE.buffer(%tile33) { sym_name = "c" } : memref<256xi32>
+  %buf33_0 = AIE.buffer(%tile33) { sym_name = "c" } : memref<256xi32>
 
   %lock23_3 = AIE.lock(%tile23, 3) { sym_name = "input_lock" } // input buffer lock
   %lock23_5 = AIE.lock(%tile23, 5) { sym_name = "inter_lock" } // interbuffer lock
@@ -46,7 +46,7 @@ module @test4_row_shared_memory {
   }
 
 
-  %core23 = AIE.core(%tile23) {
+  %core33 = AIE.core(%tile33) {
   AIE.useLock(%lock23_5, "Acquire", 1) // acquire for read(e.g. input ping)
     AIE.useLock(%lock33_7, "Acquire", 0) // acquire for write
     %idx1 = arith.constant 3 : index
@@ -56,7 +56,7 @@ module @test4_row_shared_memory {
     %4 = arith.addi %3, %val1 : i32
     %5 = arith.addi %4, %val1 : i32
     %idx2 = arith.constant 5 : index
-    memref.store %5, %buf23_0[%idx2] : memref<256xi32>
+    memref.store %5, %buf33_0[%idx2] : memref<256xi32>
     AIE.useLock(%lock23_5, "Release", 0) // release for write
     AIE.useLock(%lock33_7, "Release", 1) // release for read
     AIE.end