[SYCL] reqd_work_group_size attribute is reversed (fix intel#8)

Signed-off-by: Aleksander Fadeev <[email protected]>
fadeeval · Mar 3, 2020 · 9125bc1 · 9125bc1
1 parent 245f323
commit 9125bc1
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Showing 2 changed files with 9 additions and 12 deletions.
diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp
@@ -2939,20 +2939,18 @@ static void handleWorkGroupSize(Sema &S, Decl *D, const ParsedAttr &AL) {
     return;
 
   WorkGroupAttr *Existing = D->getAttr<WorkGroupAttr>();
-  if (Existing && !(Existing->getXDim() == WGSize[0] &&
-                    Existing->getYDim() == WGSize[1] &&
-                    Existing->getZDim() == WGSize[2]))
+  if (Existing &&
+      !(Existing->getXDim() == WGSize[0] && Existing->getYDim() == WGSize[1] &&
+        Existing->getZDim() == WGSize[2]))
     S.Diag(AL.getLoc(), diag::warn_duplicate_attribute) << AL;
   if (S.getLangOpts().SYCLIsDevice)
-  D->addAttr(::new (S.Context)
-                 WorkGroupAttr(S.Context, AL, WGSize[2], WGSize[1], WGSize[0]));
-  else 
-  D->addAttr(::new (S.Context)
-                 WorkGroupAttr(S.Context, AL, WGSize[0], WGSize[1], WGSize[2]));
-
+    D->addAttr(::new (S.Context) WorkGroupAttr(S.Context, AL, WGSize[2],
+                                               WGSize[1], WGSize[0]));
+  else
+    D->addAttr(::new (S.Context) WorkGroupAttr(S.Context, AL, WGSize[0],
+                                               WGSize[1], WGSize[2]));
 }
 
-
 // Handles intel_reqd_sub_group_size.
 static void handleSubGroupSize(Sema &S, Decl *D, const ParsedAttr &AL) {
   uint32_t SGSize;

diff --git a/clang/test/CodeGenSYCL/reqd-work-group-size.cpp b/clang/test/CodeGenSYCL/reqd-work-group-size.cpp
@@ -27,7 +27,7 @@ void bar() {
   kernel<class kernel_name2>(f);
 
   kernel<class kernel_name3>(
-  []() [[cl::reqd_work_group_size(8, 8, 8)]] {});
+      []() [[cl::reqd_work_group_size(8, 8, 8)]]{});
 }
 
 // CHECK: define spir_kernel void @{{.*}}kernel_name1() {{.*}} !reqd_work_group_size ![[WGSIZE32:[0-9]+]]
@@ -36,4 +36,3 @@ void bar() {
 // CHECK: ![[WGSIZE32]] = !{i32 16, i32 16, i32 32}
 // CHECK: ![[WGSIZE8]] = !{i32 1, i32 1, i32 8}
 // CHECK: ![[WGSIZE88]] = !{i32 8, i32 8, i32 8}
-