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I²C NACK on write/address byte does not error using i2c_master (IDFGH-12073) #13134
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I²C NACK on write/address byte does not error using i2c_master
I²C NACK on write/address byte does not error using i2c_master (IDFGH-12073)
Feb 7, 2024
Can you clarify which IDF versions "new I2C driver" refers to? |
v5.2 onwards. |
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KJ7LNW
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Mar 15, 2024
As pointed out in PR espressif#13134 by @MatthiasKunnen, there is a deadlock in `s_i2c_synchronous_transaction()` if `s_i2c_transaction_start()` should fail because, on error, s_i2c_synchronous_transaction() returns before releasing the lock. This commit fixes the deadlock without any other changes. Closes: espressif#13387 Signed-off-by: Eric Wheeler <[email protected]>
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Mar 16, 2024
As pointed out in PR #13134 by @MatthiasKunnen, there is a deadlock in `s_i2c_synchronous_transaction()` if `s_i2c_transaction_start()` should fail because, on error, s_i2c_synchronous_transaction() returns before releasing the lock. This commit fixes the deadlock without any other changes. Closes: #13387 Signed-off-by: Eric Wheeler <[email protected]>
nebkat
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Apr 9, 2024
As pointed out in PR espressif#13134 by @MatthiasKunnen, there is a deadlock in `s_i2c_synchronous_transaction()` if `s_i2c_transaction_start()` should fail because, on error, s_i2c_synchronous_transaction() returns before releasing the lock. This commit fixes the deadlock without any other changes. Closes: espressif#13387 Signed-off-by: Eric Wheeler <[email protected]>
espressif-bot
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Apr 9, 2024
As pointed out in PR #13134 by @MatthiasKunnen, there is a deadlock in `s_i2c_synchronous_transaction()` if `s_i2c_transaction_start()` should fail because, on error, s_i2c_synchronous_transaction() returns before releasing the lock. This commit fixes the deadlock without any other changes. Closes: #13387 Signed-off-by: Eric Wheeler <[email protected]>
Solved |
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Status: Done
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Resolution: Done
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Nov 6, 2024
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keywords: I²C NACK no error, i2c_master, i2c master, new driver
IDF version: 5454d37 (current master)
Problem/Current behavior
When using the new I²C driver (
i2c_master
) functions, a NACK is perceived as an ACK on both slaveaddresses and write bytes.
When the address byte results in a NACK (no device with this address is on the bus), the driver
continues as if an ACK was received.
When a write byte results in a NACK, the driver continues as if an ACK was received.
This affects the following functions:
i2c_master_receive
i2c_master_transmit
i2c_master_transmit_receive
A non-exhaustive list of things that could go wrong because of this:
i2c_master_transmit
on a missing slave appears to succeed.i2c_master_transmit
on an existing but busy slave appears to succeed.i2c_master_receive
andi2c_master_transmit_receive
on a missing slave results in fakeFF
bytes which is not distinguishable from an existing slave and validFF
bytes.This is a regression from the old driver which verifies both the slave address ACK and the write byte's ACK, e.g.:
i2c_master_write_read_device
, address byteesp-idf/components/driver/i2c/i2c.c
Line 1077 in 5454d37
i2c_master_write_read_device
, registry address byteesp-idf/components/driver/i2c/i2c.c
Line 1082 in 5454d37
I²C Read Byte example using
i2c_master_transmit_receive
resulting inESP_OK
andFF
output.Code that generated this signal
Expected behavior
To be compliant with I²C and/or SMBus, the controller upon detection of the NACK condition must generate a STOP condition to abort the transfer.
Solution
I will be making a PR that attempts to address both.
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