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Merge branch 'bugfix/fix_c3_s3_ble_temperature_performance' into 'mas…
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…ter'

Fixed bluetooth disconnection caused by HW temperature rise or fall on ESP32C3 and ESP32S3

See merge request espressif/esp-idf!20748
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jack0c committed Nov 22, 2022
2 parents 65c0b2b + 73cd69d commit cea6614
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Showing 4 changed files with 5 additions and 8 deletions.
3 changes: 0 additions & 3 deletions components/bt/controller/esp32c3/bt.c
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,6 @@ extern bool btdm_deep_sleep_mem_init(void);
extern void btdm_deep_sleep_mem_deinit(void);
extern void btdm_ble_power_down_dma_copy(bool copy);
extern uint8_t btdm_sleep_clock_sync(void);
extern void sdk_config_extend_set_pll_track(bool enable);

#if CONFIG_MAC_BB_PD
extern void esp_mac_bb_power_down(void);
Expand Down Expand Up @@ -1092,8 +1091,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
// overwrite some parameters
cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;

sdk_config_extend_set_pll_track(false);

#if CONFIG_MAC_BB_PD
esp_mac_bb_pd_mem_init();
#endif
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3 changes: 0 additions & 3 deletions components/bt/controller/esp32s3/bt.c
Original file line number Diff line number Diff line change
Expand Up @@ -247,7 +247,6 @@ extern bool btdm_deep_sleep_mem_init(void);
extern void btdm_deep_sleep_mem_deinit(void);
extern void btdm_ble_power_down_dma_copy(bool copy);
extern uint8_t btdm_sleep_clock_sync(void);
extern void sdk_config_extend_set_pll_track(bool enable);

#if CONFIG_MAC_BB_PD
extern void esp_mac_bb_power_down(void);
Expand Down Expand Up @@ -1138,8 +1137,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
// overwrite some parameters
cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL;

sdk_config_extend_set_pll_track(false);

#if CONFIG_MAC_BB_PD
esp_mac_bb_pd_mem_init();
#endif
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2 changes: 1 addition & 1 deletion components/esp_phy/lib
5 changes: 4 additions & 1 deletion components/esp_phy/test/test_phy_rtc.c
Original file line number Diff line number Diff line change
Expand Up @@ -81,12 +81,15 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)

#if SOC_BT_SUPPORTED

#if CONFIG_IDF_TARGET_ESP32
/* Only esp32 will call bt_track_pll_cap() in the interrupt
handler, other chips will call this function in the task
*/
ESP_LOGI(TAG, "Test bt_track_pll_cap()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
bt_track_pll_cap();
spi_flash_enable_interrupts_caches_and_other_cpu();

#if CONFIG_IDF_TARGET_ESP32
extern void bt_bb_init_cmplx_reg(void);
ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
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