move {target}/rom/miniz.h to a common miniz.h

- Move {target}/rom/miniz.h to common miniz.h
- Add ESP_ROM_HAS_MZ_CRC32 for ESP32/S2/S3/C3/H2
- Alias mz_crc32 to crc32_le if chips not support ESP_ROM_HAS_MZ_CRC32

components/esp_rom/esp32/Kconfig.soc_caps.in

@@ -11,6 +11,10 @@ config ESP_ROM_HAS_CRC_BE
     bool
     default y
 
+config ESP_ROM_HAS_MZ_CRC32
+    bool
+    default y
+
 config ESP_ROM_HAS_JPEG_DECODE
     bool
     default y

components/esp_rom/esp32/esp_rom_caps.h

@@ -8,5 +8,6 @@
 
 #define ESP_ROM_HAS_CRC_LE              (1) // ROM CRC library supports Little Endian
 #define ESP_ROM_HAS_CRC_BE              (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_MZ_CRC32            (1) // ROM has mz_crc32 function
 #define ESP_ROM_HAS_JPEG_DECODE         (1) // ROM has JPEG decode library
 #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND    (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing

components/esp_rom/esp32c3/Kconfig.soc_caps.in

@@ -11,6 +11,10 @@ config ESP_ROM_HAS_CRC_BE
     bool
     default y
 
+config ESP_ROM_HAS_MZ_CRC32
+    bool
+    default y
+
 config ESP_ROM_HAS_JPEG_DECODE
     bool
     default y

components/esp_rom/esp32c3/esp_rom_caps.h

@@ -8,6 +8,7 @@
 
 #define ESP_ROM_HAS_CRC_LE                  (1) // ROM CRC library supports Little Endian
 #define ESP_ROM_HAS_CRC_BE                  (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_MZ_CRC32                (1) // ROM has mz_crc32 function
 #define ESP_ROM_HAS_JPEG_DECODE             (1) // ROM has JPEG decode library
 #define ESP_ROM_UART_CLK_IS_XTAL            (1) // UART clock source is selected to XTAL in ROM
 #define ESP_ROM_USB_SERIAL_DEVICE_NUM       (3) // UART uses USB_SERIAL_JTAG port in ROM.

components/esp_rom/esp32h2/Kconfig.soc_caps.in

@@ -11,6 +11,10 @@ config ESP_ROM_HAS_CRC_BE
     bool
     default y
 
+config ESP_ROM_HAS_MZ_CRC32
+    bool
+    default y
+
 config ESP_ROM_HAS_JPEG_DECODE
     bool
     default y

components/esp_rom/esp32h2/esp_rom_caps.h

@@ -8,6 +8,7 @@
 
 #define ESP_ROM_HAS_CRC_LE                  (1) // ROM CRC library supports Little Endian
 #define ESP_ROM_HAS_CRC_BE                  (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_MZ_CRC32                (1) // ROM has mz_crc32 function
 #define ESP_ROM_HAS_JPEG_DECODE             (1) // ROM has JPEG decode library
 #define ESP_ROM_UART_CLK_IS_XTAL            (1) // UART clock source is selected to XTAL in ROM
 #define ESP_ROM_USB_SERIAL_DEVICE_NUM       (3) // UART uses USB_SERIAL_JTAG port in ROM.

components/esp_rom/esp32s2/Kconfig.soc_caps.in

@@ -7,6 +7,10 @@ config ESP_ROM_HAS_CRC_LE
     bool
     default y
 
+config ESP_ROM_HAS_MZ_CRC32
+    bool
+    default y
+
 config ESP_ROM_NEEDS_SWSETUP_WORKAROUND
     bool
     default y

components/esp_rom/esp32s2/esp_rom_caps.h

@@ -7,4 +7,5 @@
 #pragma once
 
 #define ESP_ROM_HAS_CRC_LE            (1) // ROM CRC library supports Little Endian
+#define ESP_ROM_HAS_MZ_CRC32          (1) // ROM has mz_crc32 function
 #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND    (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing

components/esp_rom/esp32s3/Kconfig.soc_caps.in

@@ -11,6 +11,10 @@ config ESP_ROM_HAS_CRC_BE
     bool
     default y
 
+config ESP_ROM_HAS_MZ_CRC32
+    bool
+    default y
+
 config ESP_ROM_HAS_JPEG_DECODE
     bool
     default y

components/esp_rom/esp32s3/esp_rom_caps.h

@@ -8,6 +8,7 @@
 
 #define ESP_ROM_HAS_CRC_LE                  (1) // ROM CRC library supports Little Endian
 #define ESP_ROM_HAS_CRC_BE                  (1) // ROM CRC library supports Big Endian
+#define ESP_ROM_HAS_MZ_CRC32                (1) // ROM has mz_crc32 function
 #define ESP_ROM_HAS_JPEG_DECODE             (1) // ROM has JPEG decode library
 #define ESP_ROM_UART_CLK_IS_XTAL            (1) // UART clock source is selected to XTAL in ROM
 #define ESP_ROM_HAS_RETARGETABLE_LOCKING    (1) // ROM was built with retargetable locking