Merge branch 'feature/merge_c3_caps' into 'master'

soc: merge C3 caps into a single soc_caps.h See merge request espressif/esp-idf!13337
espressif · May 6, 2021 · 5849041 · 5849041
2 parents ca89608 + 504a1e6
commit 5849041
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Showing 24 changed files with 200 additions and 463 deletions.
diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32c3.c b/components/bootloader_support/src/bootloader_flash_config_esp32c3.c
@@ -24,7 +24,7 @@
 #include "soc/efuse_reg.h"
 #include "soc/spi_reg.h"
 #include "soc/spi_mem_reg.h"
-#include "soc/spi_caps.h"
+#include "soc/soc_caps.h"
 #include "flash_qio_mode.h"
 #include "bootloader_flash_config.h"
 #include "bootloader_common.h"

diff --git a/components/esp32c3/esp_ds.c b/components/esp32c3/esp_ds.c
@@ -131,7 +131,7 @@ esp_err_t esp_ds_start_sign(const void *message,
     // check encryption key from HMAC
     int64_t start_time = esp_timer_get_time();
     while (ds_ll_busy() != 0) {
-        if ((esp_timer_get_time() - start_time) > DS_KEY_CHECK_MAX_WAIT_US) {
+        if ((esp_timer_get_time() - start_time) > SOC_DS_KEY_CHECK_MAX_WAIT_US) {
             ds_disable_release();
             return ESP32C3_ERR_HW_CRYPTO_DS_INVALID_KEY;
         }

diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
@@ -342,7 +342,7 @@ static void IRAM_ATTR suspend_uarts(void)
         uint32_t uart_fsm = 0;
         do {
             uart_fsm = uart_ll_get_fsm_status(i);
-        } while (!(uart_fsm == UART_FSM_IDLE || uart_fsm == UART_FSM_TX_WAIT_SEND));
+        } while (!(uart_fsm == UART_LL_FSM_IDLE || uart_fsm == UART_LL_FSM_TX_WAIT_SEND));
 #else
         while (uart_ll_get_fsm_status(i) != 0) {}
 #endif
@@ -368,13 +368,13 @@ esp_err_t esp_sleep_cpu_pd_low_init(bool enable)
 {
     if (enable) {
         if (s_config.cpu_pd_mem == NULL) {
-            void *buf = heap_caps_aligned_alloc(RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN,
-                                                RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE,
+            void *buf = heap_caps_aligned_alloc(SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN,
+                                                SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE,
                                                 MALLOC_CAP_RETENTION | MALLOC_CAP_DEFAULT);
             if (buf) {
-                memset(buf, 0, RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE);
+                memset(buf, 0, SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE + RTC_HAL_DMA_LINK_NODE_SIZE);
                 s_config.cpu_pd_mem = rtc_cntl_hal_dma_link_init(buf,
-                                      buf + RTC_HAL_DMA_LINK_NODE_SIZE, RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE, NULL);
+                                      buf + RTC_HAL_DMA_LINK_NODE_SIZE, SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE, NULL);
             } else {
                 return ESP_ERR_NO_MEM;
             }

diff --git a/components/hal/esp32c3/include/hal/cpu_ll.h b/components/hal/esp32c3/include/hal/cpu_ll.h
@@ -15,7 +15,7 @@
 
 #include <stdint.h>
 
-#include "soc/cpu_caps.h"
+#include "soc/soc_caps.h"
 #include "esp_bit_defs.h"
 #include "soc/assist_debug_reg.h"
 #include "esp_attr.h"

diff --git a/components/hal/esp32c3/include/hal/ds_ll.h b/components/hal/esp32c3/include/hal/ds_ll.h
@@ -24,7 +24,7 @@
 #include <string.h>
 
 #include "soc/hwcrypto_reg.h"
-#include "soc/ds_caps.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -69,7 +69,7 @@ static inline ds_key_check_t ds_ll_key_error_source(void)
  */
 static inline void ds_ll_configure_iv(const uint32_t *iv)
 {
-    for (size_t i = 0; i < (DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
+    for (size_t i = 0; i < (SOC_DS_KEY_PARAM_MD_IV_LENGTH / sizeof(uint32_t)); i++) {
         REG_WRITE(DS_IV_BASE + (i * 4) , iv[i]);
     }
 }
@@ -99,9 +99,9 @@ static inline void ds_ll_write_private_key_params(const uint8_t *encrypted_key_p
     */
     typedef struct { uint32_t addr; size_t len; } frag_t;
     const frag_t frags[] = {
-                            {DS_C_Y_BASE,  DS_SIGNATURE_MAX_BIT_LEN / 8},
-                            {DS_C_M_BASE,  DS_SIGNATURE_MAX_BIT_LEN / 8},
-                            {DS_C_RB_BASE, DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_Y_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_M_BASE,  SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
+                            {DS_C_RB_BASE, SOC_DS_SIGNATURE_MAX_BIT_LEN / 8},
                             {DS_C_BOX_BASE, DS_IV_BASE - DS_C_BOX_BASE},
     };
     const size_t NUM_FRAGS = sizeof(frags)/sizeof(frag_t);

diff --git a/components/hal/esp32c3/include/hal/gdma_ll.h b/components/hal/esp32c3/include/hal/gdma_ll.h
@@ -17,7 +17,7 @@
 #include <stdbool.h>
 #include "soc/gdma_struct.h"
 #include "soc/gdma_reg.h"
-#include "soc/gdma_caps.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/components/hal/esp32c3/include/hal/mpu_ll.h b/components/hal/esp32c3/include/hal/mpu_ll.h
@@ -14,7 +14,7 @@
 
 #include <stdint.h>
 
-#include "soc/mpu_caps.h"
+#include "soc/soc_caps.h"
 
 #ifdef __cplusplus
 extern "C" {

diff --git a/components/hal/esp32c3/include/hal/uart_ll.h b/components/hal/esp32c3/include/hal/uart_ll.h
@@ -32,6 +32,9 @@ extern "C" {
 #define UART_LL_MIN_WAKEUP_THRESH (2)
 #define UART_LL_INTR_MASK         (0x7ffff) //All interrupt mask
 
+#define UART_LL_FSM_IDLE                       (0x0)
+#define UART_LL_FSM_TX_WAIT_SEND               (0xf)
+
 // Define UART interrupts
 typedef enum {
     UART_INTR_RXFIFO_FULL      = (0x1 << 0),

diff --git a/components/hal/esp32c3/rtc_cntl_hal.c b/components/hal/esp32c3/rtc_cntl_hal.c
@@ -19,7 +19,7 @@
 #include "esp32c3/rom/lldesc.h"
 #include "esp_attr.h"
 
-#define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN  (RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
+#define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN  (SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */
 
 typedef struct rtc_cntl_link_buf_conf {
     uint32_t cfg[4];    /* 4 word for dma link buffer configuration */

diff --git a/components/soc/esp32c3/include/soc/brownout_caps.h b/components/soc/esp32c3/include/soc/brownout_caps.h
diff --git a/components/soc/esp32c3/include/soc/cpu_caps.h b/components/soc/esp32c3/include/soc/cpu_caps.h
diff --git a/components/soc/esp32c3/include/soc/ds_caps.h b/components/soc/esp32c3/include/soc/ds_caps.h
diff --git a/components/soc/esp32c3/include/soc/gdma_caps.h b/components/soc/esp32c3/include/soc/gdma_caps.h
diff --git a/components/soc/esp32c3/include/soc/gpio_caps.h b/components/soc/esp32c3/include/soc/gpio_caps.h
diff --git a/components/soc/esp32c3/include/soc/i2c_caps.h b/components/soc/esp32c3/include/soc/i2c_caps.h
diff --git a/components/soc/esp32c3/include/soc/i2s_caps.h b/components/soc/esp32c3/include/soc/i2s_caps.h
diff --git a/components/soc/esp32c3/include/soc/ledc_caps.h b/components/soc/esp32c3/include/soc/ledc_caps.h
diff --git a/components/soc/esp32c3/include/soc/mpu_caps.h b/components/soc/esp32c3/include/soc/mpu_caps.h
diff --git a/components/soc/esp32c3/include/soc/rtc_caps.h b/components/soc/esp32c3/include/soc/rtc_caps.h