Skip to content
This repository has been archived by the owner on May 23, 2024. It is now read-only.

Commit

Permalink
Merge pull request #28 from jessebraham/fixes/housekeeping
Browse files Browse the repository at this point in the history 
Refactoring, formatting, and CI
  • Loading branch information
@bjoernQ
bjoernQ authored Nov 22, 2022
2 parents 0a32e0c + 38e3583 commit cf9720e
Show file tree
Hide file tree
Showing 4 changed files with 197 additions and 120 deletions.
80 changes: 80 additions & 0 deletions .github/workflows/ci.yml
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,80 @@
name: CI

on:
pull_request:
branches:
- main
push:
workflow_dispatch:

env:
CARGO_TERM_COLOR: always

jobs:
check-riscv:
name: Check RISC-V
runs-on: ubuntu-latest
strategy:
matrix:
chip: [esp32c2, esp32c3, esp32c6, esp32h2]
printer: ["rtt", "uart"]
include:
- chip: esp32c3
printer: "jtag_serial"
- chip: esp32c6
printer: "jtag_serial"
- chip: esp32h2
printer: "jtag_serial"
steps:
- uses: actions/checkout@v2
- uses: actions-rs/toolchain@v1
with:
profile: minimal
target: riscv32imc-unknown-none-elf
toolchain: nightly
components: rust-src
default: true
- uses: Swatinem/rust-cache@v1
- uses: actions-rs/cargo@v1
with:
command: check
args: -Zbuild-std=core --no-default-features --target=riscv32imc-unknown-none-elf --features=${{ matrix.chip }},${{ matrix.printer }}

check-xtensa:
name: Check Xtensa
runs-on: ubuntu-latest
strategy:
matrix:
chip: [esp32, esp32s2, esp32s3]
printer: ["rtt", "uart"]
include:
- chip: esp32s3
printer: "jtag_serial"
steps:
- uses: actions/checkout@v2
- uses: esp-rs/[email protected]
with:
default: true
ldproxy: false
- uses: Swatinem/rust-cache@v1
- uses: actions-rs/cargo@v1
with:
command: check
args: -Zbuild-std=core --no-default-features --target=xtensa-${{ matrix.chip }}-none-elf --features=${{ matrix.chip }},${{ matrix.printer }}

rustfmt:
name: Check formatting
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v2
- uses: actions-rs/toolchain@v1
with:
profile: minimal
toolchain: stable
override: true
components: rustfmt
- uses: Swatinem/rust-cache@v1
- uses: actions-rs/cargo@v1
with:
command: fmt
args: --all -- --check
5 changes: 3 additions & 2 deletions build.rs
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,15 +31,16 @@ fn main() {
}

// Ensure that, if the `jtag_serial` communication method feature is enabled,
// either the `esp32c3`, `esp32c6` or `esp32s3` chip feature is enabled.
// either the `esp32c3`, `esp32c6`, `esp32h2`, or `esp32s3` chip feature is
// enabled.
if cfg!(feature = "jtag_serial")
&& !(cfg!(feature = "esp32c3")
|| cfg!(feature = "esp32c6")
|| cfg!(feature = "esp32h2")
|| cfg!(feature = "esp32s3"))
{
panic!(
"The `jtag_serial` feature is only supported by the ESP32-C3, ESP32-C6, and ESP32-S3"
"The `jtag_serial` feature is only supported by the ESP32-C3, ESP32-C6, ESP32-H2, and ESP32-S3"
);
}
}
12 changes: 12 additions & 0 deletions rustfmt.toml
View file
Original file line number Diff line number Diff line change
@@ -0,0 +1,12 @@
# Comments
format_code_in_doc_comments = true
normalize_comments = true
wrap_comments = true

# Enums
enum_discrim_align_threshold = 25

# Imports
group_imports = "StdExternalCrate"
imports_granularity = "Crate"
imports_layout = "HorizontalVertical"
220 changes: 102 additions & 118 deletions src/lib.rs
View file
Original file line number Diff line number Diff line change
@@ -1,164 +1,148 @@
#![no_std]

#[cfg(feature = "log")]
pub mod logger;
#[cfg(feature = "rtt")]
mod rtt;

#[cfg(feature = "no-op")]
#[macro_export]
macro_rules! println {
($($arg:tt)*) => {
{
}
};
}

#[cfg(feature = "no-op")]
#[macro_export]
macro_rules! print {
($($arg:tt)*) => {
{
}
};
}

#[cfg(not(feature = "no-op"))]
#[macro_export]
macro_rules! println {
($($arg:tt)*) => {
#[cfg(not(feature = "no-op"))]
{
use core::fmt::Write;
writeln!($crate::Printer, $($arg)*).ok();
}
};
}

#[cfg(not(feature = "no-op"))]
#[macro_export]
macro_rules! print {
($($arg:tt)*) => {
#[cfg(not(feature = "no-op"))]
{
use core::fmt::Write;
write!($crate::Printer, $($arg)*).ok();
}
};
}

#[cfg(feature = "log")]
pub mod logger;

#[cfg(feature = "esp32")]
const UART_TX_ONE_CHAR: usize = 0x40009200;
#[cfg(any(feature = "esp32c2", feature = "esp32c6", feature = "esp32h2"))]
const UART_TX_ONE_CHAR: usize = 0x40000058;
#[cfg(feature = "esp32c3")]
const UART_TX_ONE_CHAR: usize = 0x40000068;
#[cfg(feature = "esp32s3")]
const UART_TX_ONE_CHAR: usize = 0x40000648;
#[cfg(feature = "esp8266")]
const UART_TX_ONE_CHAR: usize = 0x40003b30;

pub struct Printer;

#[cfg(feature = "uart")]
impl core::fmt::Write for Printer {
#[cfg(not(feature = "esp32s2"))]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
with(|| {
for &b in s.as_bytes() {
unsafe {
let uart_tx_one_char: unsafe extern "C" fn(u8) -> i32 =
core::mem::transmute(UART_TX_ONE_CHAR);
uart_tx_one_char(b)
};
}
core::fmt::Result::Ok(())
})
}

#[cfg(feature = "esp32s2")]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
with(|| {
// On ESP32-S2 the UART_TX_ONE_CHAR ROM-function seems to have some issues.
for chunk in s.as_bytes().chunks(64) {
for &b in chunk {
unsafe {
// write FIFO
(0x3f400000 as *mut u32).write_volatile(b as u32);
};
}

// wait for TX_DONE
while unsafe { (0x3f400004 as *const u32).read_volatile() } & (1 << 14) == 0 {}
unsafe {
// reset TX_DONE
(0x3f400010 as *mut u32).write_volatile(1 << 14);
#[cfg(feature = "rtt")]
mod rtt_printer {
impl core::fmt::Write for super::Printer {
fn write_str(&mut self, s: &str) -> core::fmt::Result {
super::with(|| {
let count = crate::rtt::write_str_internal(s);
if count < s.len() {
crate::rtt::write_str_internal(&s[count..]);
}
}
core::fmt::Result::Ok(())
})
core::fmt::Result::Ok(())
})
}
}
}

#[cfg(all(feature = "jtag_serial", any(feature = "esp32c3", feature = "esp32h2")))]
const SERIAL_JTAG_FIFO_REG: usize = 0x6004_3000;
#[cfg(all(feature = "jtag_serial", any(feature = "esp32c3", feature = "esp32h2")))]
const SERIAL_JTAG_CONF_REG: usize = 0x6004_3004;
#[cfg(feature = "jtag_serial")]
mod serial_jtag_printer {
#[cfg(any(feature = "esp32c3", feature = "esp32h2"))]
const SERIAL_JTAG_FIFO_REG: usize = 0x6004_3000;
#[cfg(any(feature = "esp32c3", feature = "esp32h2"))]
const SERIAL_JTAG_CONF_REG: usize = 0x6004_3004;

#[cfg(all(feature = "jtag_serial", feature = "esp32c6"))]
const SERIAL_JTAG_FIFO_REG: usize = 0x6000_F000;
#[cfg(all(feature = "jtag_serial", feature = "esp32c6"))]
const SERIAL_JTAG_CONF_REG: usize = 0x6000_F004;
#[cfg(feature = "esp32c6")]
const SERIAL_JTAG_FIFO_REG: usize = 0x6000_F000;
#[cfg(feature = "esp32c6")]
const SERIAL_JTAG_CONF_REG: usize = 0x6000_F004;

#[cfg(all(feature = "jtag_serial", feature = "esp32s3"))]
const SERIAL_JTAG_FIFO_REG: usize = 0x6003_8000;
#[cfg(all(feature = "jtag_serial", feature = "esp32s3"))]
const SERIAL_JTAG_CONF_REG: usize = 0x6003_8004;
#[cfg(feature = "esp32s3")]
const SERIAL_JTAG_FIFO_REG: usize = 0x6003_8000;
#[cfg(feature = "esp32s3")]
const SERIAL_JTAG_CONF_REG: usize = 0x6003_8004;

#[cfg(all(
feature = "jtag_serial",
any(
#[cfg(any(
feature = "esp32c3",
feature = "esp32c6",
feature = "esp32h2",
feature = "esp32s3"
)
))]
impl core::fmt::Write for Printer {
fn write_str(&mut self, s: &str) -> core::fmt::Result {
with(|| {
unsafe {
let fifo = SERIAL_JTAG_FIFO_REG as *mut u32;
let conf = SERIAL_JTAG_CONF_REG as *mut u32;

// todo 64 byte chunks max
for chunk in s.as_bytes().chunks(32) {
for &b in chunk {
fifo.write_volatile(b as u32);
}
conf.write_volatile(0b001);

while conf.read_volatile() & 0b011 == 0b000 {
// wait
))]
impl core::fmt::Write for super::Printer {
fn write_str(&mut self, s: &str) -> core::fmt::Result {
super::with(|| {
unsafe {
let fifo = SERIAL_JTAG_FIFO_REG as *mut u32;
let conf = SERIAL_JTAG_CONF_REG as *mut u32;

// todo 64 byte chunks max
for chunk in s.as_bytes().chunks(32) {
for &b in chunk {
fifo.write_volatile(b as u32);
}
conf.write_volatile(0b001);

while conf.read_volatile() & 0b011 == 0b000 {
// wait
}
}
}
}

core::fmt::Result::Ok(())
})
core::fmt::Result::Ok(())
})
}
}
}

#[cfg(feature = "rtt")]
mod rtt;
#[cfg(feature = "uart")]
mod uart_printer {
#[cfg(feature = "esp32")]
const UART_TX_ONE_CHAR: usize = 0x40009200;
#[cfg(any(feature = "esp32c2", feature = "esp32c6", feature = "esp32h2"))]
const UART_TX_ONE_CHAR: usize = 0x40000058;
#[cfg(feature = "esp32c3")]
const UART_TX_ONE_CHAR: usize = 0x40000068;
#[cfg(feature = "esp32s3")]
const UART_TX_ONE_CHAR: usize = 0x40000648;
#[cfg(feature = "esp8266")]
const UART_TX_ONE_CHAR: usize = 0x40003b30;

impl core::fmt::Write for super::Printer {
#[cfg(not(feature = "esp32s2"))]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
super::with(|| {
for &b in s.as_bytes() {
unsafe {
let uart_tx_one_char: unsafe extern "C" fn(u8) -> i32 =
core::mem::transmute(UART_TX_ONE_CHAR);
uart_tx_one_char(b)
};
}
core::fmt::Result::Ok(())
})
}

#[cfg(feature = "rtt")]
impl core::fmt::Write for Printer {
fn write_str(&mut self, s: &str) -> core::fmt::Result {
with(|| {
let count = crate::rtt::write_str_internal(s);
if count < s.len() {
crate::rtt::write_str_internal(&s[count..]);
}
core::fmt::Result::Ok(())
})
#[cfg(feature = "esp32s2")]
fn write_str(&mut self, s: &str) -> core::fmt::Result {
super::with(|| {
// On ESP32-S2 the UART_TX_ONE_CHAR ROM-function seems to have some issues.
for chunk in s.as_bytes().chunks(64) {
for &b in chunk {
unsafe {
// write FIFO
(0x3f400000 as *mut u32).write_volatile(b as u32);
};
}

// wait for TX_DONE
while unsafe { (0x3f400004 as *const u32).read_volatile() } & (1 << 14) == 0 {}
unsafe {
// reset TX_DONE
(0x3f400010 as *mut u32).write_volatile(1 << 14);
}
}
core::fmt::Result::Ok(())
})
}
}
}

Expand Down

0 comments on commit cf9720e

Please sign in to comment.