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Support USB-DEVICE on ESP32-S3 and ESP32-S2
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,123 @@ | ||
| //! USB OTG full-speed peripheral | ||
|
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| pub use esp_synopsys_usb_otg::UsbBus; | ||
| use esp_synopsys_usb_otg::UsbPeripheral; | ||
|
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||
| use crate::{ | ||
| pac, | ||
| system::{Peripheral, PeripheralClockControl}, | ||
| types::InputSignal, | ||
| }; | ||
|
|
||
| #[doc(hidden)] | ||
| pub trait UsbSel {} | ||
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| #[doc(hidden)] | ||
| pub trait UsbDp {} | ||
|
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||
| #[doc(hidden)] | ||
| pub trait UsbDm {} | ||
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| pub struct USB<S, P, M> | ||
| where | ||
| S: UsbSel + Send + Sync, | ||
| P: UsbDp + Send + Sync, | ||
| M: UsbDm + Send + Sync, | ||
| { | ||
| _usb0: pac::USB0, | ||
| _usb_sel: S, | ||
| _usb_dp: P, | ||
| _usb_dm: M, | ||
| } | ||
|
|
||
| impl<S, P, M> USB<S, P, M> | ||
| where | ||
| S: UsbSel + Send + Sync, | ||
| P: UsbDp + Send + Sync, | ||
| M: UsbDm + Send + Sync, | ||
| { | ||
| pub fn new( | ||
| usb0: pac::USB0, | ||
| usb_sel: S, | ||
| usb_dp: P, | ||
| usb_dm: M, | ||
| peripheral_clock_control: &mut PeripheralClockControl, | ||
| ) -> Self { | ||
| peripheral_clock_control.enable(Peripheral::Usb); | ||
| Self { | ||
| _usb0: usb0, | ||
| _usb_sel: usb_sel, | ||
| _usb_dp: usb_dp, | ||
| _usb_dm: usb_dm, | ||
| } | ||
| } | ||
| } | ||
|
|
||
| unsafe impl<S, P, M> Sync for USB<S, P, M> | ||
| where | ||
| S: UsbSel + Send + Sync, | ||
| P: UsbDp + Send + Sync, | ||
| M: UsbDm + Send + Sync, | ||
| { | ||
| } | ||
|
|
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| unsafe impl<S, P, M> UsbPeripheral for USB<S, P, M> | ||
| where | ||
| S: UsbSel + Send + Sync, | ||
| P: UsbDp + Send + Sync, | ||
| M: UsbDm + Send + Sync, | ||
| { | ||
| const REGISTERS: *const () = pac::USB0::ptr() as *const (); | ||
|
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||
| const HIGH_SPEED: bool = false; | ||
| const FIFO_DEPTH_WORDS: usize = 256; | ||
| const ENDPOINT_COUNT: usize = 5; | ||
|
|
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| fn enable() { | ||
| unsafe { | ||
| let usb_wrap = &*pac::USB_WRAP::PTR; | ||
| usb_wrap.otg_conf.modify(|_, w| { | ||
| w.usb_pad_enable() | ||
| .set_bit() | ||
| .phy_sel() | ||
| .clear_bit() | ||
| .clk_en() | ||
| .set_bit() | ||
| .ahb_clk_force_on() | ||
| .set_bit() | ||
| .phy_clk_force_on() | ||
| .set_bit() | ||
| }); | ||
|
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||
| #[cfg(esp32s3)] | ||
| { | ||
| let rtc = &*pac::RTC_CNTL::PTR; | ||
| rtc.usb_conf | ||
| .modify(|_, w| w.sw_hw_usb_phy_sel().set_bit().sw_usb_phy_sel().set_bit()); | ||
| } | ||
|
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||
| crate::gpio::connect_high_to_peripheral(InputSignal::USB_OTG_IDDIG); // connected connector is mini-B side | ||
| crate::gpio::connect_high_to_peripheral(InputSignal::USB_SRP_BVALID); // HIGH to force USB device mode | ||
| crate::gpio::connect_high_to_peripheral(InputSignal::USB_OTG_VBUSVALID); // receiving a valid Vbus from device | ||
| crate::gpio::connect_low_to_peripheral(InputSignal::USB_OTG_AVALID); | ||
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| usb_wrap.otg_conf.modify(|_, w| { | ||
| w.pad_pull_override() | ||
| .set_bit() | ||
| .dp_pullup() | ||
| .set_bit() | ||
| .dp_pulldown() | ||
| .clear_bit() | ||
| .dm_pullup() | ||
| .clear_bit() | ||
| .dm_pulldown() | ||
| .clear_bit() | ||
| }); | ||
| } | ||
| } | ||
|
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||
| fn ahb_frequency_hz(&self) -> u32 { | ||
| // unused | ||
| 80_000_000 | ||
| } | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,87 @@ | ||
| //! CDC-ACM serial port example using polling in a busy loop. | ||
| //! | ||
| //! This example should be built in release mode. | ||
|
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| #![no_std] | ||
| #![no_main] | ||
|
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| use esp32s2_hal::{ | ||
| clock::{ClockControl, CpuClock}, | ||
| otg_fs::{UsbBus, USB}, | ||
| pac::Peripherals, | ||
| prelude::*, | ||
| timer::TimerGroup, | ||
| Rtc, | ||
| IO, | ||
| }; | ||
| use esp_backtrace as _; | ||
| use usb_device::prelude::{UsbDeviceBuilder, UsbVidPid}; | ||
| use xtensa_lx_rt::entry; | ||
|
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| static mut EP_MEMORY: [u32; 1024] = [0; 1024]; | ||
|
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| #[entry] | ||
| fn main() -> ! { | ||
| let peripherals = Peripherals::take().unwrap(); | ||
| let mut system = peripherals.SYSTEM.split(); | ||
| let clocks = ClockControl::configure(system.clock_control, CpuClock::Clock240MHz).freeze(); | ||
|
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| let timer_group0 = TimerGroup::new(peripherals.TIMG0, &clocks); | ||
| let mut wdt = timer_group0.wdt; | ||
| let mut rtc = Rtc::new(peripherals.RTC_CNTL); | ||
|
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| // Disable MWDT and RWDT (Watchdog) flash boot protection | ||
| wdt.disable(); | ||
| rtc.rwdt.disable(); | ||
|
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| let io = IO::new(peripherals.GPIO, peripherals.IO_MUX); | ||
|
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| let usb = USB::new( | ||
| peripherals.USB0, | ||
| io.pins.gpio18, | ||
| io.pins.gpio19, | ||
| io.pins.gpio20, | ||
| &mut system.peripheral_clock_control, | ||
| ); | ||
|
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| let usb_bus = UsbBus::new(usb, unsafe { &mut EP_MEMORY }); | ||
|
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| let mut serial = usbd_serial::SerialPort::new(&usb_bus); | ||
|
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| let mut usb_dev = UsbDeviceBuilder::new(&usb_bus, UsbVidPid(0x16c0, 0x27dd)) | ||
| .manufacturer("esp-hal") | ||
| .product("esp-hal") | ||
| .serial_number("12345678") | ||
| .device_class(usbd_serial::USB_CLASS_CDC) | ||
| .build(); | ||
|
|
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| loop { | ||
| if !usb_dev.poll(&mut [&mut serial]) { | ||
| continue; | ||
| } | ||
|
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| let mut buf = [0u8; 64]; | ||
|
|
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| match serial.read(&mut buf) { | ||
| Ok(count) if count > 0 => { | ||
| // Echo back in upper case | ||
| for c in buf[0..count].iter_mut() { | ||
| if 0x61 <= *c && *c <= 0x7a { | ||
| *c &= !0x20; | ||
| } | ||
| } | ||
|
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| let mut write_offset = 0; | ||
| while write_offset < count { | ||
| match serial.write(&buf[write_offset..count]) { | ||
| Ok(len) if len > 0 => { | ||
| write_offset += len; | ||
| } | ||
| _ => {} | ||
| } | ||
| } | ||
| } | ||
| _ => {} | ||
| } | ||
| } | ||
| } |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
|
|
@@ -11,6 +11,7 @@ pub use esp_hal_common::{ | |
| interrupt, | ||
| ledc, | ||
| macros, | ||
| otg_fs, | ||
| pac, | ||
| prelude, | ||
| pulse_control, | ||
|
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