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rtc: Add RWDT examples for ESP32, ESP32-S2 and ESP32-S3
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Signed-off-by: Gustavo Henrique Nihei <[email protected]>
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gustavonihei committed Aug 8, 2022
1 parent 91ea205 commit 4548ef9
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66 changes: 66 additions & 0 deletions esp32-hal/examples/rtc_watchdog.rs
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//! This demos the RTC Watchdog Timer (RWDT).
//! The RWDT is initially configured to trigger an interrupt after a given
//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
//! to reset both the main system and the RTC.

#![no_std]
#![no_main]

use core::cell::RefCell;

use esp32_hal::{
clock::ClockControl,
interrupt,
pac::{self, Peripherals},
prelude::*,
Rtc,
};
use esp_hal_common::Rwdt;
use panic_halt as _;
use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
use xtensa_lx_rt::entry;

static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
CriticalSectionMutex::new(RefCell::new(None));

#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.DPORT.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.RTC_CNTL);

// Disable watchdog timer
rtc.rwdt.disable();

rtc.rwdt.start(2000u64.millis());
rtc.rwdt.listen();

interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();

unsafe {
(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
}

loop {}
}

#[interrupt]
fn RTC_CORE() {
unsafe {
(&RWDT).lock(|data| {
esp_println::println!("RWDT Interrupt");

let mut rwdt = data.borrow_mut();
let rwdt = rwdt.as_mut().unwrap();

rwdt.clear_interrupt();

esp_println::println!("Restarting in 5 seconds...");

rwdt.start(5000u64.millis());
rwdt.unlisten();
});
}
}
66 changes: 66 additions & 0 deletions esp32s2-hal/examples/rtc_watchdog.rs
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//! This demos the RTC Watchdog Timer (RWDT).
//! The RWDT is initially configured to trigger an interrupt after a given
//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
//! to reset both the main system and the RTC.

#![no_std]
#![no_main]

use core::cell::RefCell;

use esp32s2_hal::{
clock::ClockControl,
interrupt,
pac::{self, Peripherals},
prelude::*,
Rtc,
};
use esp_hal_common::Rwdt;
use panic_halt as _;
use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
use xtensa_lx_rt::entry;

static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
CriticalSectionMutex::new(RefCell::new(None));

#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.RTC_CNTL);

// Disable watchdog timer
rtc.rwdt.disable();

rtc.rwdt.start(2000u64.millis());
rtc.rwdt.listen();

interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();

unsafe {
(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
}

loop {}
}

#[interrupt]
fn RTC_CORE() {
unsafe {
(&RWDT).lock(|data| {
esp_println::println!("RWDT Interrupt");

let mut rwdt = data.borrow_mut();
let rwdt = rwdt.as_mut().unwrap();

rwdt.clear_interrupt();

esp_println::println!("Restarting in 5 seconds...");

rwdt.start(5000u64.millis());
rwdt.unlisten();
});
}
}
66 changes: 66 additions & 0 deletions esp32s3-hal/examples/rtc_watchdog.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
//! This demos the RTC Watchdog Timer (RWDT).
//! The RWDT is initially configured to trigger an interrupt after a given
//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
//! to reset both the main system and the RTC.

#![no_std]
#![no_main]

use core::cell::RefCell;

use esp32s3_hal::{
clock::ClockControl,
interrupt,
pac::{self, Peripherals},
prelude::*,
Rtc,
};
use esp_hal_common::Rwdt;
use panic_halt as _;
use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
use xtensa_lx_rt::entry;

static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
CriticalSectionMutex::new(RefCell::new(None));

#[entry]
fn main() -> ! {
let peripherals = Peripherals::take().unwrap();
let system = peripherals.SYSTEM.split();
let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();

let mut rtc = Rtc::new(peripherals.RTC_CNTL);

// Disable watchdog timer
rtc.rwdt.disable();

rtc.rwdt.start(2000u64.millis());
rtc.rwdt.listen();

interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();

unsafe {
(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
}

loop {}
}

#[interrupt]
fn RTC_CORE() {
unsafe {
(&RWDT).lock(|data| {
esp_println::println!("RWDT Interrupt");

let mut rwdt = data.borrow_mut();
let rwdt = rwdt.as_mut().unwrap();

rwdt.clear_interrupt();

esp_println::println!("Restarting in 5 seconds...");

rwdt.start(5000u64.millis());
rwdt.unlisten();
});
}
}

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