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Merge pull request #2411 from IBMJimmyk/SIMDStringHashCode
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Fix recognition of hashCode function on Power
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gita-omr authored Jul 27, 2018
2 parents d43cf1e + a5a0930 commit 56684b8
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Showing 4 changed files with 27 additions and 1 deletion.
10 changes: 10 additions & 0 deletions runtime/compiler/env/ProcessorDetection.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -562,6 +562,16 @@ TR_J9VMBase::getPPCProcessorType()
return portLibCall_getProcessorType();
}

bool
TR_J9VMBase::getPPCSupportsVSXRegisters()
{
#if defined(TR_TARGET_POWER)
return TR::Compiler->target.cpu.getPPCSupportsVSX();
#else
return false;
#endif // TR_TARGET_POWER
}

// -----------------------------------------------------------------------------

extern TR_X86CPUIDBuffer *queryX86TargetCPUID(void * javaVM);
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15 changes: 15 additions & 0 deletions runtime/compiler/env/VMJ9.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3109,6 +3109,21 @@ bool TR_J9VMBase::supressInliningRecognizedInitialCallee(TR_CallSite* callsite,
}
break;
case TR::java_lang_String_hashCodeImplDecompressed:
/*
* X86 and z want to avoid inlining both java_lang_String_hashCodeImplDecompressed and java_lang_String_hashCodeImplCompressed
* so they can be recognized and replaced with a custom fast implementation.
* Power currently only has the custom fast implementation for java_lang_String_hashCodeImplDecompressed.
* As a result, Power only wants to prevent inlining of java_lang_String_hashCodeImplDecompressed.
* When Power gets a fast implementation of TR::java_lang_String_hashCodeImplCompressed, this case can be merged into the case
* for java_lang_String_hashCodeImplCompressed instead of using a fallthrough.
*/
if (!TR::Compiler->om.canGenerateArraylets() &&
TR::Compiler->target.cpu.isPower() && TR::Compiler->target.cpu.id() >= TR_PPCp8 && getPPCSupportsVSXRegisters() && !comp->compileRelocatableCode())
{
dontInlineRecognizedMethod = true;
break;
}
// Intentional fallthrough here.
case TR::java_lang_String_hashCodeImplCompressed:
if (!TR::Compiler->om.canGenerateArraylets()){
if ((TR::Compiler->target.cpu.isX86() && getX86SupportsSSE4_1()) ||
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1 change: 1 addition & 0 deletions runtime/compiler/env/VMJ9.h
Original file line number Diff line number Diff line change
Expand Up @@ -273,6 +273,7 @@ class TR_J9VMBase : public TR_FrontEnd
static TR_J9VMBase * get(J9JITConfig *, J9VMThread *, VM_TYPE vmType=DEFAULT_VM);
static char *getJ9FormattedName(J9JITConfig *, J9PortLibrary *, char *, int32_t, char *, char *, bool suffix=false);
static TR_Processor getPPCProcessorType();
virtual bool getPPCSupportsVSXRegisters();
static void initializeX86ProcessorInfo(J9JITConfig *);

static bool isBigDecimalClass(J9UTF8 * className);
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2 changes: 1 addition & 1 deletion runtime/compiler/p/codegen/J9TreeEvaluator.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -12112,7 +12112,7 @@ J9::Power::CodeGenerator::inlineDirectCall(TR::Node *node, TR::Register *&result
return true;

case TR::java_lang_String_hashCodeImplDecompressed:
if (TR::Compiler->target.cpu.id() >= TR_PPCp8 && TR::Compiler->target.cpu.getPPCSupportsVSX() && !cg->comp()->compileRelocatableCode())
if (!TR::Compiler->om.canGenerateArraylets() && TR::Compiler->target.cpu.id() >= TR_PPCp8 && TR::Compiler->target.cpu.getPPCSupportsVSX() && !cg->comp()->compileRelocatableCode())
{
resultReg = inlineStringHashcode(node, cg);
return true;
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