JIT ARM64-SVE: Add FR_2A, GB_2A, FV_2A, FY_3A #98248
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch Issue DetailsPart of #94549. Adds the following encodings:
cstool output: JitDisasm output: cc @dotnet/arm64-contrib
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Diff results for #98248Throughput diffsThroughput diffs for linux/arm64 ran on linux/x64Overall (+0.00% to +0.01%)
MinOpts (+0.00% to +0.01%)
FullOpts (+0.00% to +0.01%)
Throughput diffs for osx/arm64 ran on linux/x64Overall (+0.00% to +0.01%)
MinOpts (+0.00% to +0.01%)
FullOpts (+0.00% to +0.01%)
Throughput diffs for windows/arm64 ran on linux/x64Overall (+0.00% to +0.01%)
MinOpts (+0.00% to +0.01%)
FullOpts (+0.00% to +0.01%)
Details here |
Diff results for #98248Throughput diffsThroughput diffs for osx/arm64 ran on windows/x64MinOpts (-0.00% to +0.01%)
Throughput diffs for windows/arm64 ran on windows/x64MinOpts (-0.00% to +0.01%)
Details here Throughput diffs for linux/arm64 ran on linux/x64MinOpts (-0.01% to -0.00%)
Details here |
kunalspathak
approved these changes
Feb 12, 2024
| assert(insOptsScalableStandard(opt)); | ||
| assert(isVectorRegister(reg1)); // ddddd | ||
| assert(isVectorRegister(reg2)); // nnnnn | ||
| assert((imm == 90) || (imm == 270)); // r |
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Suggested change
| assert((imm == 90) || (imm == 270)); // r | |
| assert(emitIsValidEncodedRotationImm90_or_270(imm)); // r |
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emitIsValidEncodedRotationImm90_or_270 checks if imm is 0 or 1. Maybe I can add isValidRot90_or_270?
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I think you should add emitIsValidEncodedRotationImm90_or_270() checks around line 1617 i.e. inside emitInsSanityCheck() the way @TIHan added. Can you make it consistent to the way we have e.g. IF_SVE_GP_3A?
| // Returns true if 'value' is a legal unsigned immediate 3 bit encoding, starting from 1 (such as for SHRNB). | ||
| static bool isValidUimm3From1(ssize_t value) | ||
| { | ||
| return (1 <= value) && (value <= 8); |
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some of the numbers in isValid* are hex while others are decimal, do you mind changing to hex wherever it makes sense?
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Sure thing. By "wherever it makes sense," do you mean we should only convert decimal numbers to hex if they're >=10? Because in the above example, there wouldn't be anything to change.
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yeah it was a nit comment, not for this particular example, but there are examples of <= 15 that can be converted to <= 0xF but other places like (value <= 224) can stay decimals.
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@kunalspathak thanks for the review, I've addressed your feedback. Is it ok if I merge this? |
| @@ -1679,7 +1753,7 @@ void emitter::emitInsSanityCheck(instrDesc* id) | |||
| assert(insOptsScalableStandard(id->idInsOpt())); | |||
| assert(isVectorRegister(id->idReg1())); // ddddd | |||
| assert(isVectorRegister(id->idReg2())); // nnnnn | |||
| assert(isValidUimm2(emitGetInsSC(id))); // rr | |||
| assert(emitIsValidEncodedRotationImm0_to_270(emitGetInsSC(id))); // rr | |||
| code |= insEncodeReg_V_9_to_5(id->idReg2()); // mmmmm | ||
| code |= insEncodeImm1_10(emitGetInsSC(id)); // r | ||
| code |= insEncodeElemsize(optGetSveElemsize(id->idInsOpt())); // xx | ||
| dst += emitOutput_Instr(dst, code); |
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missing check for 90 or 270?
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We check for this in emitIns_R_R_I and in emitInsSanityCheck. Do you want me to check for this in emitOutputInstr too? I suppose I can add a dedicated insEncodeRot* method for encoding the bit at location 10 to make the meaning of r more clear.
| case IF_SVE_FV_2A: // ........xx...... .....rmmmmmddddd -- SVE2 complex integer add | ||
| { | ||
| // Rotation bit implies rotation is 270 if set, else rotation is 90 | ||
| const ssize_t rot = (emitGetInsSC(id) == 0) ? 90 : 270; |
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can you use decode function for this and at other places if they are missing?
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Sure thing, thanks for catching that.
Diff results for #98248Throughput diffsThroughput diffs for osx/arm64 ran on windows/x64MinOpts (+0.00% to +0.01%)
Details here Throughput diffs for linux/arm64 ran on linux/x64MinOpts (-0.01% to -0.00%)
Details here |
Diff results for #98248Throughput diffsThroughput diffs for linux/arm64 ran on windows/x64MinOpts (+0.00% to +0.01%)
Details here Throughput diffs for linux/arm64 ran on linux/x64MinOpts (-0.01% to -0.00%)
Details here |
kunalspathak
approved these changes
Feb 13, 2024
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Part of #94549. Adds the following encodings:
cstool output:
JitDisasm output:
cc @dotnet/arm64-contrib