This allows for more registers to be encoded in the register allocator.

Commit includes refactoring code to use `const instrDesc *` instead of `instruction`
so information about when EVEX is needed (due to high SIMD registers) is
available to the emitter.

Commit constrains certain hw intrinsics and gentree nodes to use
lower SIMD registers even if upper SIMD registers are available due
to limitations of EVEX encoding for certain instructions.

For example, SSE `Reciprocal` lowers to `rcpps` which does not have an
EVEX encoding form, hence, we cannot allow that hw intrincis node to use
a high SIMD register.

These intrinsics are marked with `HW_Flag_NoEvexSemantics`. Other such
intructions related to masking (typically marked with
`HW_Flag_ReturnsPerElementMask`) also have similar issues (though they
can be replaced with the EVEX k registers and associated masking when
implemented).

In addition, the callee/calleer save registers have also been adjusted
to properly handle the presence and absence of AVX512 upper simd
registers at runtime.

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

Co-authored-by: Bruce Forstall <[email protected]>

…runtime into avx512-upper-regs

This reverts commit 91cf3db.

Convert from macros to accessor functions for
RBM_ALLFLOAT, RBM_FLT_CALLEE_TRASH, CNT_CALLEE_TRASH_FLOAT.
Convert LSRA use of ACTUAL_REG_COUNT to AVAILABLE_REG_COUNT,
and create an accessor for that value for AMD64 as well.

…egs-with-reg-accessors

Use inline accessor functions instead of macros