Use inline accessor functions instead of macros

Convert from macros to accessor functions for
RBM_ALLFLOAT, RBM_FLT_CALLEE_TRASH, CNT_CALLEE_TRASH_FLOAT.
Convert LSRA use of ACTUAL_REG_COUNT to AVAILABLE_REG_COUNT,
and create an accessor for that value for AMD64 as well.

src/coreclr/jit/codegen.h

@@ -35,6 +35,17 @@ class CodeGen final : public CodeGenInterface
         GenTree* addr, bool fold, bool* revPtr, GenTree** rv1Ptr, GenTree** rv2Ptr, unsigned* mulPtr, ssize_t* cnsPtr);
 
 private:
+#if defined(TARGET_AMD64)
+    regMaskTP get_RBM_ALLFLOAT() const
+    {
+        return compiler->rbmAllFloat;
+    }
+    regMaskTP get_RBM_FLT_CALLEE_TRASH() const
+    {
+        return compiler->rbmFltCalleeTrash;
+    }
+#endif // TARGET_AMD64
+
 #if defined(TARGET_XARCH)
     // Bit masks used in negating a float or double number.
     // This is to avoid creating more than one data constant for these bitmasks when a

src/coreclr/jit/codegencommon.cpp

@@ -29,13 +29,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 
 #include "patchpointinfo.h"
 
-// Please see the comment for these instance variables in `compiler.h`
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (this->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (this->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (this->cntCalleeTrashFloat)
-#endif
-
 /*****************************************************************************/
 
 void CodeGenInterface::setFramePointerRequiredEH(bool value)
@@ -782,16 +775,6 @@ void Compiler::compChangeLife(VARSET_VALARG_TP newLife)
     }
 }
 
-#undef RBM_ALLFLOAT_USE
-#undef RBM_FLT_CALLEE_TRASH_USE
-#undef CNT_CALLEE_TRASH_FLOAT_USE
-
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (compiler->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (compiler->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (compiler->cntCalleeTrashFloat)
-#endif
-
 // Need an explicit instantiation.
 template void Compiler::compChangeLife<true>(VARSET_VALARG_TP newLife);
 
@@ -9428,4 +9411,4 @@ bool CodeGen::genCanOmitNormalizationForBswap16(GenTree* tree)
     }
 
     return (cast->gtCastType == TYP_USHORT) || (cast->gtCastType == TYP_SHORT);
-}
+}

src/coreclr/jit/codegenlinear.cpp

@@ -17,13 +17,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 #include "emit.h"
 #include "codegen.h"
 
-// Please see the comment for these instance variables in `compiler.h`
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (compiler->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (compiler->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (compiler->cntCalleeTrashFloat)
-#endif
-
 //------------------------------------------------------------------------
 // genInitializeRegisterState: Initialize the register state contained in 'regSet'.
 //
@@ -2690,4 +2683,4 @@ void CodeGen::genCodeForSetcc(GenTreeCC* setcc)
     inst_SETCC(setcc->gtCondition, setcc->TypeGet(), setcc->GetRegNum());
     genProduceReg(setcc);
 }
-#endif // !TARGET_LOONGARCH64
+#endif // !TARGET_LOONGARCH64

src/coreclr/jit/codegenxarch.cpp

@@ -23,12 +23,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 #include "gcinfoencoder.h"
 #include "patchpointinfo.h"
 
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (compiler->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (compiler->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (compiler->cntCalleeTrashFloat)
-#endif
-
 //---------------------------------------------------------------------
 // genSetGSSecurityCookie: Set the "GS" security cookie in the prolog.
 //
@@ -11053,4 +11047,4 @@ bool CodeGenInterface::genCodeAddrNeedsReloc(size_t addr)
 #endif // TARGET_X86
 }
 
-#endif // TARGET_XARCH
+#endif // TARGET_XARCH

src/coreclr/jit/compiler.cpp

@@ -3330,7 +3330,7 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
     rbmAllFloat         = RBM_ALLFLOAT_INIT;
     rbmFltCalleeTrash   = RBM_FLT_CALLEE_TRASH_INIT;
     cntCalleeTrashFloat = CNT_CALLEE_TRASH_FLOAT_INIT;
-    actualRegCount      = ACTUAL_REG_COUNT;
+    availableRegCount   = ACTUAL_REG_COUNT;
 
     if (DoJitStressEvexEncoding())
     {
@@ -3340,7 +3340,7 @@ void Compiler::compInitOptions(JitFlags* jitFlags)
     }
     else
     {
-        actualRegCount -= CNT_HIGHFLOAT;
+        availableRegCount -= CNT_HIGHFLOAT;
     }
 #endif // TARGET_AMD64
 }
@@ -3546,6 +3546,37 @@ bool Compiler::compPromoteFewerStructs(unsigned lclNum)
     return rejectThisPromo;
 }
 
+//------------------------------------------------------------------------
+// dumpRegMask: display a register mask. For well-known sets of registers, display a well-known token instead of
+// a potentially large number of registers.
+//
+// Arguments:
+//   regs - The set of registers to display
+//
+void Compiler::dumpRegMask(regMaskTP regs) const
+{
+    if (regs == RBM_ALLINT)
+    {
+        printf("[allInt]");
+    }
+    else if (regs == (RBM_ALLINT & ~RBM_FPBASE))
+    {
+        printf("[allIntButFP]");
+    }
+    else if (regs == RBM_ALLFLOAT)
+    {
+        printf("[allFloat]");
+    }
+    else if (regs == RBM_ALLDOUBLE)
+    {
+        printf("[allDouble]");
+    }
+    else
+    {
+        dspRegMask(regs);
+    }
+}
+
 #endif // DEBUG
 
 void Compiler::compInitDebuggingInfo()
@@ -10293,4 +10324,4 @@ void Compiler::EnregisterStats::Dump(FILE* fout) const
     PRINT_STATS(m_stressLclFld, m_addrExposed);
     PRINT_STATS(m_dispatchRetBuf, m_addrExposed);
 }
-#endif // TRACK_ENREG_STATS
+#endif // TRACK_ENREG_STATS

src/coreclr/jit/compiler.h

@@ -10361,6 +10361,8 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 
     bool compJitHaltMethod();
 
+    void dumpRegMask(regMaskTP regs) const;
+
 #endif
 
     /*
@@ -10637,21 +10639,44 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
     bool killGCRefs(GenTree* tree);
 
 #if defined(TARGET_AMD64)
-public:
+private:
     // The following are for initializing register allocator "constants" defined in targetamd64.h
     // that now depend upon runtime ISA information, e.g., the presence of AVX512F/VL, which increases
-    // the number of simd (xmm,ymm, and zmm) registers from 16 to 32.
+    // the number of SIMD (xmm, ymm, and zmm) registers from 16 to 32.
     // As only 64-bit xarch has the capability to have the additional registers, we limit the changes
     // to TARGET_AMD64 only.
     //
-    // Users of `targetamd64.h` need to define three macros, RBM_ALLFLOAT_USE, RBM_FLT_CALLEE_TRASH_USE,
-    // and CNT_CALLEE_TRASH_FLOAT_USE which should point to these three variables respectively.
-    // We did this to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
+    // Users of these values need to define four accessor functions:
+    //
+    //    regMaskTP get_RBM_ALLFLOAT();
+    //    regMaskTP get_RBM_FLT_CALLEE_TRASH();
+    //    unsigned get_CNT_CALLEE_TRASH_FLOAT();
+    //    unsigned get_AVAILABLE_REG_COUNT();
+    //
+    // which return the values of these variables.
+    //
+    // This was done to avoid polluting all `targetXXX.h` macro definitions with a compiler parameter, where only
     // TARGET_AMD64 requires one.
+    //
     regMaskTP rbmAllFloat;
     regMaskTP rbmFltCalleeTrash;
     unsigned  cntCalleeTrashFloat;
-    unsigned  actualRegCount;
+    unsigned  availableRegCount;
+
+public:
+    regMaskTP get_RBM_ALLFLOAT() const
+    {
+        return rbmAllFloat;
+    }
+    regMaskTP get_RBM_FLT_CALLEE_TRASH() const
+    {
+        return rbmFltCalleeTrash;
+    }
+    unsigned get_CNT_CALLEE_TRASH_FLOAT() const
+    {
+        return cntCalleeTrashFloat;
+    }
+
 #endif // TARGET_AMD64
 
 }; // end of class Compiler

src/coreclr/jit/emit.cpp

@@ -20,14 +20,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 #include "emit.h"
 #include "codegen.h"
 
-// Please see the comment for these instance variables in `compiler.h`
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (emitComp->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (emitComp->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (emitComp->cntCalleeTrashFloat)
-#define ACTUAL_REG_COUNT (emitComp->actualRegCount)
-#endif
-
 /*****************************************************************************
  *
  *  Represent an emitter location.
@@ -107,6 +99,17 @@ void emitLocation::Print(LONG compMethodID) const
 }
 #endif // DEBUG
 
+#if defined(TARGET_AMD64)
+inline regMaskTP emitter::get_RBM_FLT_CALLEE_TRASH() const
+{
+    return emitComp->rbmFltCalleeTrash;
+}
+inline unsigned emitter::get_AVAILABLE_REG_COUNT() const
+{
+    return emitComp->availableRegCount;
+}
+#endif // TARGET_AMD64
+
 /*****************************************************************************
  *
  *  Return the name of an instruction format.
@@ -3212,11 +3215,19 @@ void emitter::emitDispRegSet(regMaskTP regs)
 
     for (reg = REG_FIRST; reg < ACTUAL_REG_COUNT; reg = REG_NEXT(reg))
     {
-        if ((regs & genRegMask(reg)) == 0)
+        if (regs == RBM_NONE)
+        {
+            break;
+        }
+
+        regMaskTP curReg = genRegMask(reg);
+        if ((regs & curReg) == 0)
         {
             continue;
         }
 
+        regs -= curReg;
+
         if (sp)
         {
             printf(" ");
@@ -9955,7 +9966,3 @@ void emitter::emitEnableGC()
     }
 }
 #endif // !defined(JIT32_GCENCODER)
-
-#undef RBM_ALLFLOAT_USE
-#undef RBM_FLT_CALLEE_TRASH_USE
-#undef CNT_CALLEE_TRASH_FLOAT_USE

src/coreclr/jit/emit.h

@@ -1973,6 +1973,11 @@ class emitter
     CORINFO_FIELD_HANDLE emitBlkConst(const void* cnsAddr, unsigned cnsSize, unsigned cnsAlign, var_types elemType);
 
 private:
+#if defined(TARGET_AMD64)
+    regMaskTP get_RBM_FLT_CALLEE_TRASH() const;
+    unsigned  get_AVAILABLE_REG_COUNT() const;
+#endif // TARGET_AMD64
+
     CORINFO_FIELD_HANDLE emitFltOrDblConst(double constValue, emitAttr attr);
     CORINFO_FIELD_HANDLE emitSimd8Const(simd8_t constValue);
     CORINFO_FIELD_HANDLE emitSimd16Const(simd16_t constValue);

src/coreclr/jit/emitinl.h

@@ -7,13 +7,6 @@
 
 #ifdef TARGET_XARCH
 
-// Please see the comment for these instance variables in `compiler.h`
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (emitComp->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (emitComp->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (emitComp->cntCalleeTrashFloat)
-#endif
-
 /* static */
 inline bool emitter::instrIs3opImul(instruction ins)
 {
@@ -212,10 +205,6 @@ inline ssize_t emitter::emitGetInsAmdAny(instrDesc* id)
     return id->idAddr()->iiaAddrMode.amDisp;
 }
 
-#undef RBM_ALLFLOAT_USE
-#undef RBM_FLT_CALLEE_TRASH_USE
-#undef CNT_CALLEE_TRASH_FLOAT_USE
-
 #endif // TARGET_XARCH
 
 /*****************************************************************************

src/coreclr/jit/hwintrinsiccodegenxarch.cpp

@@ -23,13 +23,6 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
 #include "gcinfo.h"
 #include "gcinfoencoder.h"
 
-// Please see the comment for these instance variables in `compiler.h`
-#if defined(TARGET_AMD64)
-#define RBM_ALLFLOAT_USE (compiler->rbmAllFloat)
-#define RBM_FLT_CALLEE_TRASH_USE (compiler->rbmFltCalleeTrash)
-#define CNT_CALLEE_TRASH_FLOAT_USE (compiler->cntCalleeTrashFloat)
-#endif
-
 //------------------------------------------------------------------------
 // assertIsContainableHWIntrinsicOp: Asserts that op is containable by node
 //