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*: cargo fmt
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crawford committed Apr 9, 2020
1 parent 88dbe30 commit e6029ac
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Showing 8 changed files with 328 additions and 283 deletions.
4 changes: 1 addition & 3 deletions src/cmu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -72,10 +72,8 @@ impl I2C0Clk {
}
}


macro_rules! timerclk {
($TIMERnClk: ident, $timerN: ident) => {

pub struct $TIMERnClk {
_private: (),
}
Expand All @@ -89,7 +87,7 @@ macro_rules! timerclk {
}
}
}
}
};
}

timerclk!(TIMER0Clk, timer0);
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4 changes: 2 additions & 2 deletions src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ impl I2C0WithClock {
) -> Result<I2C0WithScl<pins::PC11<Disabled>>, ()> {
match route {
registers::i2c0::routeloc0::SCLLOCW::LOC15 => (),
_ => return Result::Err(())
_ => return Result::Err(()),
}

Ok(I2C0WithScl {
Expand All @@ -75,7 +75,7 @@ impl<SCLP: EFM32Pin> I2C0WithScl<SCLP> {
) -> Result<ConfiguredI2C0, ()> {
match route {
registers::i2c0::routeloc0::SDALOCW::LOC15 => (),
_ => return Result::Err(())
_ => return Result::Err(()),
}

let sclroute = self.sclroute;
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4 changes: 2 additions & 2 deletions src/routing.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ pub trait HasLocForFunction<P, F> {
mod per_function;
mod per_peripheral;

#[cfg(feature = "chip-efr32xg1")]
mod efr32xg1;
#[cfg(feature = "chip-efm32gg")]
mod efm32gg;
#[cfg(feature = "chip-efr32xg1")]
mod efr32xg1;
2 changes: 1 addition & 1 deletion src/routing/efm32gg.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,8 @@
//! members, so if anything is missing here that's present on another GG, it should be possible to
//! just add it.)
use crate::timer::{Timer0, Timer1, Timer2, Timer3, Channel0, Channel1, Channel2};
use super::per_peripheral::timerperipheral_pin;
use crate::timer::{Channel0, Channel1, Channel2, Timer0, Timer1, Timer2, Timer3};

// Routes with pins on duplicate routes still need some macro adjustment

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2 changes: 1 addition & 1 deletion src/routing/efr32xg1.rs
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
//! sheet](https://www.silabs.com/documents/public/data-sheets/efr32mg1-datasheet.pdf); Flex- and
//! Blue Gecko appear to be the same.
use crate::timer::{Timer0, Channel0, Channel1, Channel2};
use super::per_function::timerchannel_pin;
use crate::timer::{Channel0, Channel1, Channel2, Timer0};

timerchannel_pin!(Timer0, Channel0, PA0, loc0, cc0loc, cc0pen);

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40 changes: 20 additions & 20 deletions src/routing/per_function.rs
Original file line number Diff line number Diff line change
@@ -1,27 +1,27 @@
#[macro_export]
macro_rules! timerchannel_pin {
($TimerN: ident, $ChannelX: ident, $Pin: ident, $locI: ident, $ccXloc: ident, $ccXpen: ident) => {
impl super::HasLocForFunction<$TimerN, $ChannelX>
for crate::gpio::pins::$Pin<crate::gpio::Output>
{
unsafe fn configure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.routeloc0.modify(|_, w| w.$ccXloc().$locI());
reg.routepen.modify(|_, w| w.$ccXpen().set_bit());
});
}

impl super::HasLocForFunction<$TimerN, $ChannelX> for crate::gpio::pins::$Pin<crate::gpio::Output> {
unsafe fn configure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.routeloc0.modify(|_, w| w.$ccXloc().$locI());
reg.routepen.modify(|_, w| w.$ccXpen().set_bit());
});
}

unsafe fn deconfigure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.routepen.modify(|_, w| w.$ccXpen().clear_bit());
});
}
}

}
unsafe fn deconfigure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.routepen.modify(|_, w| w.$ccXpen().clear_bit());
});
}
}
};
}

pub(crate) use timerchannel_pin;
45 changes: 24 additions & 21 deletions src/routing/per_peripheral.rs
Original file line number Diff line number Diff line change
@@ -1,29 +1,32 @@
#[macro_export]
macro_rules! timerperipheral_pin {
($TimerN: ident, $ChannelX: ident, $Pin: ident, $is_locI: ident, $ccXpen: ident) => {
impl super::HasLocForFunction<$TimerN, $ChannelX>
for crate::gpio::pins::$Pin<crate::gpio::Output>
{
unsafe fn configure() {
// This is safe because it's read-only access
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
assert!(
reg.route.read().location().$is_locI(),
"Pin was not adaequately pre-routed"
);

impl super::HasLocForFunction<$TimerN, $ChannelX> for crate::gpio::pins::$Pin<crate::gpio::Output> {
unsafe fn configure() {
// This is safe because it's read-only access
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
assert!(reg.route.read().location().$is_locI(), "Pin was not adaequately pre-routed");
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
cortex_m::interrupt::free(|_| {
reg.route.modify(|_, w| w.$ccXpen().set_bit());
});
}

// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
cortex_m::interrupt::free(|_| {
reg.route.modify(|_, w| w.$ccXpen().set_bit());
});
}

unsafe fn deconfigure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.route.modify(|_, w| w.$ccXpen().clear_bit());
});
}
}

}
unsafe fn deconfigure() {
// FIXME https://github.com/chrysn/efm32gg-hal/issues/1
let reg = &mut *crate::timer::TimerChannel::<$TimerN, $ChannelX>::register();
cortex_m::interrupt::free(|_| {
reg.route.modify(|_, w| w.$ccXpen().clear_bit());
});
}
}
};
}

pub(crate) use timerperipheral_pin;
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