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uboot-rockchip: refresh rk3399 devices config
Fixes: #12538
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package/boot/uboot-rockchip/patches/300-rockchip-rk3399-Add-support-for-sv901-eaio.patch
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10
package/boot/uboot-rockchip/patches/301-arm64-dts-rockchip-Add-GuangMiao-G4C-support.patch
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10
...99-Add-support-for-rumu3f-fine-3399.patch → ...399-Add-support-for-rumu3f-fine3399.patch
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...oot/uboot-rockchip/patches/305-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch
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2 changes: 1 addition & 1 deletion
2
...ge/boot/uboot-rockchip/patches/306-rockchip-rk3399-Add-support-for-Rongpin-king3399.patch
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package/boot/uboot-rockchip/patches/310-rockchip-rk3399-Add-support-for-xiaobao-nas-v1.patch
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157
package/boot/uboot-rockchip/patches/321-rockchip-rk3568-Add-support-for-armsom-sige.patch
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,157 @@ | ||
--- /dev/null | ||
+++ b/configs/sige3-rk3568_defconfig | ||
@@ -0,0 +1,83 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_COUNTER_FREQUENCY=24000000 | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | ||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" | ||
+CONFIG_ROCKCHIP_RK3568=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_SPL_STACK=0x400000 | ||
+CONFIG_DEBUG_UART_BASE=0xFE660000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_LEGACY_IMAGE_FORMAT=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-evb.dtb" | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+CONFIG_SPL_MAX_SIZE=0x40000 | ||
+CONFIG_SPL_PAD_TO=0x7f8000 | ||
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | ||
+CONFIG_SPL_BSS_START_ADDR=0x4000000 | ||
+CONFIG_SPL_BSS_MAX_SIZE=0x4000 | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_I2C=y | ||
+CONFIG_CMD_MMC=y | ||
+CONFIG_CMD_USB=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+CONFIG_CMD_PMIC=y | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_SUPPORT_EMMC_RPMB=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y | ||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y | ||
+CONFIG_SPL_PINCTRL=y | ||
+CONFIG_DM_PMIC=y | ||
+CONFIG_PMIC_RK8XX=y | ||
+CONFIG_REGULATOR_RK8XX=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYS_NS16550_MEM32=y | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_USB=y | ||
+CONFIG_USB_XHCI_HCD=y | ||
+CONFIG_USB_XHCI_DWC3=y | ||
+CONFIG_USB_EHCI_HCD=y | ||
+CONFIG_USB_EHCI_GENERIC=y | ||
+CONFIG_USB_OHCI_HCD=y | ||
+CONFIG_USB_OHCI_GENERIC=y | ||
+CONFIG_USB_DWC3=y | ||
+CONFIG_ERRNO_STR=y | ||
--- /dev/null | ||
+++ b/configs/sige7-rk3588_defconfig | ||
@@ -0,0 +1,68 @@ | ||
+CONFIG_ARM=y | ||
+CONFIG_SKIP_LOWLEVEL_INIT=y | ||
+CONFIG_COUNTER_FREQUENCY=24000000 | ||
+CONFIG_ARCH_ROCKCHIP=y | ||
+CONFIG_TEXT_BASE=0x00a00000 | ||
+CONFIG_SPL_LIBCOMMON_SUPPORT=y | ||
+CONFIG_SPL_LIBGENERIC_SUPPORT=y | ||
+CONFIG_NR_DRAM_BANKS=2 | ||
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y | ||
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 | ||
+CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb1-v10" | ||
+CONFIG_ROCKCHIP_RK3588=y | ||
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y | ||
+CONFIG_SPL_SERIAL=y | ||
+CONFIG_SPL_STACK_R_ADDR=0x600000 | ||
+CONFIG_TARGET_EVB_RK3588=y | ||
+CONFIG_SPL_STACK=0x400000 | ||
+CONFIG_DEBUG_UART_BASE=0xFEB50000 | ||
+CONFIG_DEBUG_UART_CLOCK=24000000 | ||
+CONFIG_SYS_LOAD_ADDR=0xc00800 | ||
+CONFIG_DEBUG_UART=y | ||
+CONFIG_FIT=y | ||
+CONFIG_FIT_VERBOSE=y | ||
+CONFIG_SPL_LOAD_FIT=y | ||
+CONFIG_OF_BOARD_SETUP=y | ||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-evb1-v10.dtb" | ||
+# CONFIG_DISPLAY_CPUINFO is not set | ||
+CONFIG_DISPLAY_BOARDINFO_LATE=y | ||
+CONFIG_SPL_MAX_SIZE=0x40000 | ||
+CONFIG_SPL_PAD_TO=0x7f8000 | ||
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y | ||
+CONFIG_SPL_BSS_START_ADDR=0x4000000 | ||
+CONFIG_SPL_BSS_MAX_SIZE=0x4000 | ||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set | ||
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set | ||
+CONFIG_SPL_STACK_R=y | ||
+CONFIG_SPL_ATF=y | ||
+CONFIG_CMD_GPIO=y | ||
+CONFIG_CMD_GPT=y | ||
+CONFIG_CMD_MMC=y | ||
+# CONFIG_CMD_SETEXPR is not set | ||
+CONFIG_CMD_REGULATOR=y | ||
+# CONFIG_SPL_DOS_PARTITION is not set | ||
+CONFIG_SPL_OF_CONTROL=y | ||
+CONFIG_OF_LIVE=y | ||
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" | ||
+CONFIG_SPL_REGMAP=y | ||
+CONFIG_SPL_SYSCON=y | ||
+CONFIG_SPL_CLK=y | ||
+CONFIG_ROCKCHIP_GPIO=y | ||
+CONFIG_SYS_I2C_ROCKCHIP=y | ||
+CONFIG_MISC=y | ||
+CONFIG_SUPPORT_EMMC_RPMB=y | ||
+CONFIG_MMC_DW=y | ||
+CONFIG_MMC_DW_ROCKCHIP=y | ||
+CONFIG_MMC_SDHCI=y | ||
+CONFIG_MMC_SDHCI_SDMA=y | ||
+CONFIG_MMC_SDHCI_ROCKCHIP=y | ||
+CONFIG_ETH_DESIGNWARE=y | ||
+CONFIG_GMAC_ROCKCHIP=y | ||
+CONFIG_REGULATOR_PWM=y | ||
+CONFIG_PWM_ROCKCHIP=y | ||
+CONFIG_SPL_RAM=y | ||
+CONFIG_BAUDRATE=1500000 | ||
+CONFIG_DEBUG_UART_SHIFT=2 | ||
+CONFIG_SYS_NS16550_MEM32=y | ||
+CONFIG_SYSRESET=y | ||
+CONFIG_ERRNO_STR=y |
18 changes: 0 additions & 18 deletions
18
package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch
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package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-armsom-sige3-u-boot.dtsi
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