Why is level 2 not shown in the knowledge base docs?

[matthewfeickert]

Comment:

From the feedstock it seems that microarch level 2 is intended and supported:

microarch-level-feedstock/recipe/gen.py

Lines 8 to 11 in 343bcd7

	"x86_64": 1,
	"x86_64_v2": 2,
	"x86_64_v3": 3,
	"x86_64_v4": 4,

However, it is not shown in the conda-forge maintainer docs Knowledge Base example:

recipe/conda_build_config.yaml

microarch_level:
  - 1
  - 3  # [unix and x86_64]
  - 4  # [unix and x86_64]

recipe/meta.yaml

# ...
{% set build = 0 %}

build:
  number: {{ build }}          # [not (unix and x86_64)]
  number: {{ build + 100 }}    # [unix and x86_64 and microarch_level == 1]
  number: {{ build + 300 }}    # [unix and x86_64 and microarch_level == 3]
  number: {{ build + 400 }}    # [unix and x86_64 and microarch_level == 4]

requirements:
  build:
    - x86_64-microarch-level {{ microarch_level }}  # [unix and x86_64]
    - {{ compiler('c') }}
    # ...
# ...

Is there a reason for this? Perhaps I am missing something about the x86 microarches that should be obvious.

edit:

Related example PRs

• MNT: Support up to microarch_level 2 awkward-cpp-feedstock#58

[matthewfeickert]

@jaimergp as you were the one to add microarch levels to the knowledge base in conda-forge/conda-forge.github.io#2091, do you have any thoughts here as well? cc @h-vetinari @carterbox @beckermr who all reviewed that PR.

[jaimergp]

Unfortunately I only copied over this comment: conda-forge/staged-recipes#24306 (comment)

cc @mbargull ?

[carterbox]

I don't recall. Maybe it was to emphasize to maintainers that they should only target archs that actually provide a speed-up?

[h-vetinari]

I remember answering this question somewhere else, but although I didn't implement it, I don't doubt that it's to avoid the CI matrix from exploding even further. IMO level 1 is for maximum compatibility, Level 3 & 4 are for performance where CPU features are there. Level 2 would mostly be a waste of CI cycles.