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Fix alteraPll qsys generation (#2587) (#2588)
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PR #2417 caused a bug in the generation of the `qsys` file: it generated
a spurious extra output clock which was completely unused otherwise.

(cherry picked from commit 5b055fb)

Co-authored-by: Peter Lebbing <[email protected]>
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mergify[bot] and DigitalBrains1 authored Oct 6, 2023
1 parent 8eda54e commit 8d0d6be
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1 change: 1 addition & 0 deletions changelog/2023-10-05T16_56_51+02_00_correct_qsys
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FIXED: Fix `alteraPll` `qsys` generation. PR [#2417](https://github.com/clash-lang/clash-compiler/pull/2417) (included in Clash v1.6.5) caused a bug in the generation of the `qsys` file: it generated a spurious extra output clock which was completely unused otherwise.
11 changes: 5 additions & 6 deletions clash-lib/src/Clash/Primitives/Intel/ClockGen.hs
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{-|
Copyright : (C) 2018 , Google Inc.,
2021-2022, QBayLogic B.V.
2021-2023, QBayLogic B.V.
License : BSD2 (see the file LICENSE)
Maintainer : QBayLogic B.V. <[email protected]>
Expand Down Expand Up @@ -249,11 +249,10 @@ alteraPllQsysTemplate
-> State s Doc
alteraPllQsysTemplate bbCtx = pure bbText
where
(_:(_,stripVoid -> kdIn,_):(_,stripVoid -> kdOutsProd,_):_) = bbInputs bbCtx
kdOuts = case kdOutsProd of
Product _ _ ps -> ps
KnownDomain {} -> [kdOutsProd]
_ -> error "internal error: not a Product or KnownDomain"
_clocksClass
: (_,stripVoid -> kdIn,_)
: (_,stripVoid -> Product _ _ (init -> kdOuts),_)
: _ = bbInputs bbCtx

cklFreq (KnownDomain _ p _ _ _ _)
= (1.0 / (fromInteger p * 1.0e-12 :: Double)) / 1e6
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