Improve deduplication of clustesr

src/main/scala/groundtest/TraceGen.scala

@@ -75,7 +75,8 @@ case class TraceGenParams(
     new TraceGenTile(this, crossing, lookup)
   }
   val blockerCtrlAddr = None
-  val name = s"tracegen_$tileId"
+  val baseName = "tracegentile"
+  val uniqueName = s"${baseName}_$tileId"
   val clockSinkParams = ClockSinkParameters()
 }
 

src/main/scala/subsystem/Cluster.scala

@@ -20,7 +20,8 @@ case class ClusterParams(
   val clusterId: Int,
   val clockSinkParams: ClockSinkParameters = ClockSinkParameters()
 ) extends ElementParams {
-  val name = s"cluster_$clusterId"
+  val baseName = "cluster"
+  val uniqueName = s"${baseName}_$clusterId"
   def instantiate(crossing: ElementCrossingParamsLike, lookup: LookupByClusterIdImpl)(implicit p: Parameters): Cluster = {
     new Cluster(this, crossing.crossingType, lookup)
   }
@@ -101,7 +102,7 @@ trait CanAttachCluster {
   def crossingParams: ElementCrossingParamsLike
 
   def instantiate(allClusterParams: Seq[ClusterParams], instantiatedClusters: Seq[ClusterPRCIDomain])(implicit p: Parameters): ClusterPRCIDomain = {
-    val clockSinkParams = clusterParams.clockSinkParams.copy(name = Some(clusterParams.name))
+    val clockSinkParams = clusterParams.clockSinkParams.copy(name = Some(clusterParams.uniqueName))
     val cluster_prci_domain = LazyModule(new ClusterPRCIDomain(
       clockSinkParams, crossingParams, clusterParams, PriorityMuxClusterIdFromSeq(allClusterParams)))
     cluster_prci_domain
@@ -120,14 +121,14 @@ trait CanAttachCluster {
   def connectMasterPorts(domain: ClusterPRCIDomain, context: Attachable): Unit = {
     implicit val p = context.p
     val dataBus = context.locateTLBusWrapper(crossingParams.master.where)
-    dataBus.coupleFrom(clusterParams.name) { bus =>
+    dataBus.coupleFrom(clusterParams.baseName) { bus =>
       bus :=* crossingParams.master.injectNode(context) :=* domain.crossMasterPort(crossingParams.crossingType)
     }
   }
   def connectSlavePorts(domain: ClusterPRCIDomain, context: Attachable): Unit = {
     implicit val p = context.p
     val controlBus = context.locateTLBusWrapper(crossingParams.slave.where)
-    controlBus.coupleTo(clusterParams.name) { bus =>
+    controlBus.coupleTo(clusterParams.baseName) { bus =>
       domain.crossSlavePort(crossingParams.crossingType) :*= crossingParams.slave.injectNode(context) :*= TLWidthWidget(controlBus.beatBytes) :*= bus
     }
   }

src/main/scala/subsystem/Element.scala

@@ -15,7 +15,8 @@ import freechips.rocketchip.devices.debug.{TLDebugModule}
 import freechips.rocketchip.devices.tilelink._
 
 trait ElementParams {
-  val name: String
+  val baseName: String // duplicated instances shouuld share a base name
+  val uniqueName: String
   val clockSinkParams: ClockSinkParameters
 }
 

src/main/scala/subsystem/HasTiles.scala

@@ -155,7 +155,7 @@ trait CanAttachTile {
 
   /** Narrow waist through which all tiles are intended to pass while being instantiated. */
   def instantiate(allTileParams: Seq[TileParams], instantiatedTiles: Seq[TilePRCIDomain[_]])(implicit p: Parameters): TilePRCIDomain[TileType] = {
-    val clockSinkParams = tileParams.clockSinkParams.copy(name = Some(tileParams.name))
+    val clockSinkParams = tileParams.clockSinkParams.copy(name = Some(tileParams.uniqueName))
     val tile_prci_domain = LazyModule(new TilePRCIDomain[TileType](clockSinkParams, crossingParams) { self =>
       val element = self.element_reset_domain { LazyModule(tileParams.instantiate(crossingParams, PriorityMuxHartIdFromSeq(allTileParams))) }
     })
@@ -177,7 +177,7 @@ trait CanAttachTile {
   def connectMasterPorts(domain: TilePRCIDomain[TileType], context: Attachable): Unit = {
     implicit val p = context.p
     val dataBus = context.locateTLBusWrapper(crossingParams.master.where)
-    dataBus.coupleFrom(tileParams.name) { bus =>
+    dataBus.coupleFrom(tileParams.baseName) { bus =>
       bus :=* crossingParams.master.injectNode(context) :=* domain.crossMasterPort(crossingParams.crossingType)
     }
   }
@@ -187,7 +187,7 @@ trait CanAttachTile {
     implicit val p = context.p
     DisableMonitors { implicit p =>
       val controlBus = context.locateTLBusWrapper(crossingParams.slave.where)
-      controlBus.coupleTo(tileParams.name) { bus =>
+      controlBus.coupleTo(tileParams.baseName) { bus =>
         domain.crossSlavePort(crossingParams.crossingType) :*= crossingParams.slave.injectNode(context) :*= TLWidthWidget(controlBus.beatBytes) :*= bus
       }
     }
@@ -303,7 +303,7 @@ case class CloneTileAttachParams(
 
   override def instantiate(allTileParams: Seq[TileParams], instantiatedTiles: Seq[TilePRCIDomain[_]])(implicit p: Parameters): TilePRCIDomain[TileType] = {
     require(sourceHart < instantiatedTiles.size)
-    val clockSinkParams = tileParams.clockSinkParams.copy(name = Some(tileParams.name))
+    val clockSinkParams = tileParams.clockSinkParams.copy(name = Some(tileParams.uniqueName))
     val tile_prci_domain = CloneLazyModule(
       new TilePRCIDomain[TileType](clockSinkParams, crossingParams) { self =>
         val element = self.element_reset_domain { LazyModule(tileParams.instantiate(crossingParams, PriorityMuxHartIdFromSeq(allTileParams))) }

src/main/scala/tile/BaseTile.scala

@@ -344,7 +344,7 @@ abstract class BaseTile private (crossing: ClockCrossingType, q: Parameters)
     new C
   }
 
-  this.suggestName(tileParams.name)
+  this.suggestName(tileParams.baseName)
 }
 
 abstract class BaseTileModuleImp[+L <: BaseTile](outer: L) extends BaseElementModuleImp[L](outer)

src/main/scala/tile/RocketTile.scala

@@ -30,7 +30,8 @@ case class RocketTileParams(
     ) extends InstantiableTileParams[RocketTile] {
   require(icache.isDefined)
   require(dcache.isDefined)
-  val name = s"rockettile_$tileId"
+  val baseName = "rockettile"
+  val uniqueName = s"${baseName}_$tileId"
   def instantiate(crossing: ElementCrossingParamsLike, lookup: LookupByHartIdImpl)(implicit p: Parameters): RocketTile = {
     new RocketTile(this, crossing, lookup)
   }