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reset of complex Reg #587

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ElvisFlewOffToMars opened this issue Apr 21, 2017 · 2 comments
Closed

reset of complex Reg #587

ElvisFlewOffToMars opened this issue Apr 21, 2017 · 2 comments

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@ElvisFlewOffToMars
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ElvisFlewOffToMars commented Apr 21, 2017

Hello everyone!

For example, I have some data structure:

class str extends Bundle {
  val a = UInt(5.W)
  val b = Bool()
}

And create a Reg of Vec for such data structure:

val regVec = Reg(Vec (8, new str))

The problem is I can't to describe the init definition for such structure.

Is there any way to describe it? or may be I should choose another way for str or regVec declaration?

It is also interesting to learn about init for Valid(gen) or Decoupled(gen) Regs.

Can I create a Valid(gen) reg width only valid reg init value? like this:

always (posedge clock) begin
  if (reset) valid <= 1'b0
      else if (something) valid <= something
  if (something) gen <= something
end
@edwardcwang
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This is the problem in #418.

You can work around it by creating a wire for the "constant" of str, with something like this:

val initVal = Wire(new str)
initVal.a := 0.U
initVal.b := false.B
val myReg = RegInit(initVal)

@ElvisFlewOffToMars
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Thank you.

jackkoenig pushed a commit that referenced this issue Feb 28, 2023
This updates the spec to refelect the changes made in #587.
It also fixes issue #968.
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