CMSIS/RTX: Pre-processor defines used for assembly

CMSIS repo does not support pre-processor defines, hence multiple assembly files are added for secure/non-secure and floating point tools. Mbed OS tools support assembly file pre-processing, but the build system does not support multiple assembly files for each target, hence updating the assembly files.
c1728p9 · May 14, 2018 · 287121f · 287121f
1 parent b882548
commit 287121f
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Showing 7 changed files with 23 additions and 25 deletions.
diff --git a/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_ARM/except.S b/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_ARM/except.S
@@ -23,8 +23,8 @@
 ; */
 #ifndef MBED_FAULT_HANDLER_DISABLED
 
-#ifndef __DOMAIN_NS 
-#define __DOMAIN_NS 1
+#ifndef DOMAIN_NS
+#define DOMAIN_NS 1
 #endif
 
 FAULT_TYPE_HARD_FAULT           EQU      0x10
@@ -67,7 +67,7 @@ UsageFault_Handler\
 
 Fault_Handler   PROC
                 EXPORT   Fault_Handler
-#if (__DOMAIN_NS == 1)                       
+#if (DOMAIN_NS == 1)
                 IMPORT   osRtxInfo
                 IMPORT   mbed_fault_handler
                 IMPORT   mbed_fault_context

diff --git a/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_GCC/except.S b/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_GCC/except.S
@@ -26,8 +26,8 @@
         .file    "except.S"
         .syntax  unified
 
-#ifndef __DOMAIN_NS 
-#define __DOMAIN_NS 1
+#ifndef DOMAIN_NS
+#define DOMAIN_NS 1
 #endif
 
         .equ     FAULT_TYPE_HARD_FAULT,         0x10
@@ -103,7 +103,7 @@ UsageFault_Handler:
         .cantunwind
 
 Fault_Handler:
-#if (__DOMAIN_NS == 1)
+#if (DOMAIN_NS == 1)
         MRS      R0,MSP
         LDR      R1,=0x4                
         MOV      R2,LR

diff --git a/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_IAR/except.S b/rtos/TARGET_CORTEX/TARGET_CORTEX_M/TOOLCHAIN_IAR/except.S
@@ -31,8 +31,8 @@ FAULT_TYPE_USAGE_FAULT          EQU      0x40
 
 #ifndef MBED_FAULT_HANDLER_DISABLED
 
-#ifndef __DOMAIN_NS 
-#define __DOMAIN_NS 1
+#ifndef DOMAIN_NS
+#define DOMAIN_NS 1
 #endif
                 PRESERVE8
                 SECTION .rodata:DATA:NOROOT(2)
@@ -62,7 +62,7 @@ UsageFault_Handler
 
 Fault_Handler
                 EXPORT  Fault_Handler
-#if (__DOMAIN_NS == 1)                    
+#if (DOMAIN_NS == 1)
                 IMPORT  osRtxInfo
                 IMPORT  mbed_fault_context    
                 IMPORT  mbed_fault_handler    

diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:DOMAIN_NS
-DOMAIN_NS       EQU      0
-                ENDIF
+#ifndef DOMAIN_NS
+DOMAIN_NS     EQU      0
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset

diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
@@ -24,15 +24,13 @@
 ; */
 
 
-                IF       :LNOT::DEF:DOMAIN_NS
-DOMAIN_NS       EQU      0
-                ENDIF
+#ifndef DOMAIN_NS
+DOMAIN_NS     EQU      0
+#endif
 
-                IF       ({FPU}="FPv5-SP") || ({FPU}="FPv5_D16")
-__FPU_USED      EQU      1
-                ELSE
+#ifndef __FPU_USED
 __FPU_USED      EQU      0
-                ENDIF
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset

diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M23/irq_armv8mbl.S
@@ -27,9 +27,9 @@
         .file    "irq_armv8mbl.S"
         .syntax  unified
 
-        .ifndef  DOMAIN_NS
+#ifndef  DOMAIN_NS
         .equ     DOMAIN_NS, 0
-        .endif
+#endif
 
         .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset
         .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset

diff --git a/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S b/rtos/TARGET_CORTEX/rtx5/RTX/Source/TOOLCHAIN_GCC/TARGET_M33/irq_armv8mml.S
@@ -27,13 +27,13 @@
         .file    "irq_armv8mml.S"
         .syntax  unified
 
-        .ifndef  DOMAIN_NS
+#ifndef DOMAIN_NS
         .equ     DOMAIN_NS, 0
-        .endif
+#endif
 
-        .ifndef  __FPU_USED
+#ifndef  __FPU_USED
         .equ     __FPU_USED,  0
-        .endif
+#endif
 
         .equ     I_T_RUN_OFS, 20        // osRtxInfo.thread.run offset
         .equ     TCB_SM_OFS,  48        // TCB.stack_mem offset