ISLE: aarch64: fix narrow sdiv on intmin/-1 #9541
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…e checking for intmin Co-authored-by: Michael McLoughlin <[email protected]>
avanhatt
commented
Nov 1, 2024
| ;; instructions. | ||
| (decl diff_from_32 (Type) u8) | ||
| (rule (diff_from_32 $I8) 24) | ||
| (rule (diff_from_32 $I16) 16) |
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I added this because this same pattern is used enough that a helper seems warranted (cls, clz, bitrev) but saving changing those for another PR.
avanhatt
commented
Nov 1, 2024
| @@ -3664,24 +3670,18 @@ | |||
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| ;; Check for signed overflow. The only case is min_value / -1. | |||
| ;; The following checks must be done in 32-bit or 64-bit, depending | |||
| ;; on the input type. | |||
| (spec (trap_if_div_overflow ty x y) | |||
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This spec is now stale, but the changes needed to verify the code correctly are ones we still need to upstream. Just removing for now?
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Sure -- no problem to re-add this when the rest is upstreamed.
cfallin
approved these changes
Nov 1, 2024
| @@ -3664,24 +3670,18 @@ | |||
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| ;; Check for signed overflow. The only case is min_value / -1. | |||
| ;; The following checks must be done in 32-bit or 64-bit, depending | |||
| ;; on the input type. | |||
| (spec (trap_if_div_overflow ty x y) | |||
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Sure -- no problem to re-add this when the rest is upstreamed.
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Nov 1, 2024
* Fix a missing trap on narrow sdiv of intmin/-1 by left-shifting before checking for intmin Co-authored-by: Michael McLoughlin <[email protected]> * Remove non-upstreamed verifier attributes --------- Co-authored-by: Michael McLoughlin <[email protected]>
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Fixes #9537
Clif's semantics (inherited from Wasm) specify are that divides should trap on
intmin/-1. The manual check forintminin this case in ISLE is to add 1 to the dividend and check for overflow, however, the rule was not previously catching that an 8- or 16-bitintmin - 1does not overflow with a 32-bit ARM instruction. This PR adds a left-shift of the dividend before feeding into theintmincheck, such that e.g. 0x00000080 is checked as 0x80000000. A ported version of this has been verified as correct by our prototype.Note this adds 1 additional instruction (
lsl) in the 8- and 16-bit cases ofsdiv. An alternative would be to check against hard-coded constants for those cases, but we think this would require adding a new conditional compare to theaarch64assembler.This PR also adds a file test for the new instruction sequence.