Update build files in generated-src.

aws · Jul 24, 2024 · 1158d91 · 1158d91
1 parent 44ec11c
commit 1158d91
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Showing 5 changed files with 20 additions and 23 deletions.
diff --git a/generated-src/ios-aarch64/crypto/fipsmodule/aesv8-armx.S b/generated-src/ios-aarch64/crypto/fipsmodule/aesv8-armx.S
@@ -639,7 +639,6 @@ _aes_hw_ctr32_encrypt_blocks:
 	ld1	{v7.4s},[x7]
 	add	x7,x3,#32
 	mov	w6,w5
-	csel	x12,xzr,x12,lo
 
 	// ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
 	// affected by silicon errata #1742098 [0] and #1655431 [1],
@@ -759,11 +758,12 @@ Loop3x_ctr32:
 
 	adds	x2,x2,#3
 	b.eq	Lctr32_done
+
+Lctr32_tail:
 	cmp	x2,#1
 	mov	x12,#16
 	csel	x12,xzr,x12,eq
-
-Lctr32_tail:
+	b.lt	Lctr32_done	// if len = 0, go to done
 	aese	v0.16b,v16.16b
 	aesmc	v0.16b,v0.16b
 	aese	v1.16b,v16.16b
@@ -804,11 +804,10 @@ Lctr32_tail:
 	aese	v0.16b,v23.16b
 	aese	v1.16b,v23.16b
 
-	cmp	x2,#1
 	eor	v2.16b,v2.16b,v0.16b
 	eor	v3.16b,v3.16b,v1.16b
 	st1	{v2.16b},[x1],#16
-	b.eq	Lctr32_done
+	cbz	x12,Lctr32_done  // if step = 0 (len = 1), go to done
 	st1	{v3.16b},[x1]
 
 Lctr32_done:

diff --git a/generated-src/ios-arm/crypto/fipsmodule/aesv8-armx.S b/generated-src/ios-arm/crypto/fipsmodule/aesv8-armx.S
@@ -621,7 +621,6 @@ _aes_hw_ctr32_encrypt_blocks:
 	vld1.32	{q7},[r7]
 	add	r7,r3,#32
 	mov	r6,r5
-	movlo	r12,#0
 
 	@ ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
 	@ affected by silicon errata #1742098 [0] and #1655431 [1],
@@ -741,11 +740,12 @@ Loop3x_ctr32:
 
 	adds	r2,r2,#3
 	beq	Lctr32_done
+
+Lctr32_tail:
 	cmp	r2,#1
 	mov	r12,#16
 	moveq	r12,#0
-
-Lctr32_tail:
+	blt	Lctr32_done	@ if len = 0, go to done
 .byte	0x20,0x03,0xb0,0xf3	@ aese q0,q8
 .byte	0x80,0x03,0xb0,0xf3	@ aesmc q0,q0
 .byte	0x20,0x23,0xb0,0xf3	@ aese q1,q8
@@ -786,10 +786,10 @@ Lctr32_tail:
 .byte	0x2e,0x03,0xb0,0xf3	@ aese q0,q15
 .byte	0x2e,0x23,0xb0,0xf3	@ aese q1,q15
 
-	cmp	r2,#1
 	veor	q2,q2,q0
 	veor	q3,q3,q1
 	vst1.8	{q2},[r1]!
+	cmp	r12, #0
 	beq	Lctr32_done
 	vst1.8	{q3},[r1]
 

diff --git a/generated-src/linux-aarch64/crypto/fipsmodule/aesv8-armx.S b/generated-src/linux-aarch64/crypto/fipsmodule/aesv8-armx.S
@@ -639,7 +639,6 @@ aes_hw_ctr32_encrypt_blocks:
 	ld1	{v7.4s},[x7]
 	add	x7,x3,#32
 	mov	w6,w5
-	csel	x12,xzr,x12,lo
 
 	// ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
 	// affected by silicon errata #1742098 [0] and #1655431 [1],
@@ -759,11 +758,12 @@ aes_hw_ctr32_encrypt_blocks:
 
 	adds	x2,x2,#3
 	b.eq	.Lctr32_done
+
+.Lctr32_tail:
 	cmp	x2,#1
 	mov	x12,#16
 	csel	x12,xzr,x12,eq
-
-.Lctr32_tail:
+	b.lt	.Lctr32_done	// if len = 0, go to done
 	aese	v0.16b,v16.16b
 	aesmc	v0.16b,v0.16b
 	aese	v1.16b,v16.16b
@@ -804,11 +804,10 @@ aes_hw_ctr32_encrypt_blocks:
 	aese	v0.16b,v23.16b
 	aese	v1.16b,v23.16b
 
-	cmp	x2,#1
 	eor	v2.16b,v2.16b,v0.16b
 	eor	v3.16b,v3.16b,v1.16b
 	st1	{v2.16b},[x1],#16
-	b.eq	.Lctr32_done
+	cbz	x12,.Lctr32_done  // if step = 0 (len = 1), go to done
 	st1	{v3.16b},[x1]
 
 .Lctr32_done:

diff --git a/generated-src/linux-arm/crypto/fipsmodule/aesv8-armx.S b/generated-src/linux-arm/crypto/fipsmodule/aesv8-armx.S
@@ -609,7 +609,6 @@ aes_hw_ctr32_encrypt_blocks:
 	vld1.32	{q7},[r7]
 	add	r7,r3,#32
 	mov	r6,r5
-	movlo	r12,#0
 
 	@ ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
 	@ affected by silicon errata #1742098 [0] and #1655431 [1],
@@ -729,11 +728,12 @@ aes_hw_ctr32_encrypt_blocks:
 
 	adds	r2,r2,#3
 	beq	.Lctr32_done
+
+.Lctr32_tail:
 	cmp	r2,#1
 	mov	r12,#16
 	moveq	r12,#0
-
-.Lctr32_tail:
+	blt	.Lctr32_done	@ if len = 0, go to done
 .byte	0x20,0x03,0xb0,0xf3	@ aese q0,q8
 .byte	0x80,0x03,0xb0,0xf3	@ aesmc q0,q0
 .byte	0x20,0x23,0xb0,0xf3	@ aese q1,q8
@@ -774,10 +774,10 @@ aes_hw_ctr32_encrypt_blocks:
 .byte	0x2e,0x03,0xb0,0xf3	@ aese q0,q15
 .byte	0x2e,0x23,0xb0,0xf3	@ aese q1,q15
 
-	cmp	r2,#1
 	veor	q2,q2,q0
 	veor	q3,q3,q1
 	vst1.8	{q2},[r1]!
+	cmp	r12, #0
 	beq	.Lctr32_done
 	vst1.8	{q3},[r1]
 

diff --git a/generated-src/win-aarch64/crypto/fipsmodule/aesv8-armx.S b/generated-src/win-aarch64/crypto/fipsmodule/aesv8-armx.S
@@ -651,7 +651,6 @@ aes_hw_ctr32_encrypt_blocks:
 	ld1	{v7.4s},[x7]
 	add	x7,x3,#32
 	mov	w6,w5
-	csel	x12,xzr,x12,lo
 
 	// ARM Cortex-A57 and Cortex-A72 cores running in 32-bit mode are
 	// affected by silicon errata #1742098 [0] and #1655431 [1],
@@ -771,11 +770,12 @@ Loop3x_ctr32:
 
 	adds	x2,x2,#3
 	b.eq	Lctr32_done
+
+Lctr32_tail:
 	cmp	x2,#1
 	mov	x12,#16
 	csel	x12,xzr,x12,eq
-
-Lctr32_tail:
+	b.lt	Lctr32_done	// if len = 0, go to done
 	aese	v0.16b,v16.16b
 	aesmc	v0.16b,v0.16b
 	aese	v1.16b,v16.16b
@@ -816,11 +816,10 @@ Lctr32_tail:
 	aese	v0.16b,v23.16b
 	aese	v1.16b,v23.16b
 
-	cmp	x2,#1
 	eor	v2.16b,v2.16b,v0.16b
 	eor	v3.16b,v3.16b,v1.16b
 	st1	{v2.16b},[x1],#16
-	b.eq	Lctr32_done
+	cbz	x12,Lctr32_done  // if step = 0 (len = 1), go to done
 	st1	{v3.16b},[x1]
 
 Lctr32_done: