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Arm64 #550
Arm64 #550
Commits on Apr 3, 2019
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Commits on Apr 4, 2019
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Arm64: Helper functions to extract value from vector registers
- those are used in simple mov instructions or sometimes in pseudo
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Arm64: Regular ADD can take FP operands + test
- include function decl in header from last commit
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Arm64: PSTATE operands + More systemregs
- fixed FMinMax and Movi vector variants to generate psuedo
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Arm64: Generate all conditional codes
- Fixed generation of AL and NV conditions
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- altered the definition of conditional instruction to be only true if ARM64_CC_INVALID, and generate allways true for AL and NV
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Commits on Apr 5, 2019
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Commits on Apr 11, 2019
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Arm64: Add and sub can have fp registers as operands
For some reason this is valid and the operation is addition integerwise
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Commits on Apr 17, 2019
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