[compiler-v2] Make flush writes optimization a default optimization (#…

…14620)
aptos-labs · Sep 13, 2024 · 6f4b4fa · 6f4b4fa
1 parent f356699
commit 6f4b4fa
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Showing 25 changed files with 657 additions and 577 deletions.
diff --git a/third_party/move/move-compiler-v2/src/experiments.rs b/third_party/move/move-compiler-v2/src/experiments.rs
@@ -222,7 +222,7 @@ pub static EXPERIMENTS: Lazy<BTreeMap<String, Experiment>> = Lazy::new(|| {
         Experiment {
             name: Experiment::FLUSH_WRITES_OPTIMIZATION.to_string(),
             description: "Whether to run flush writes processor and optimization".to_string(),
-            default: Inherited(Experiment::OPTIMIZE_WAITING_FOR_COMPARE_TESTS.to_string()),
+            default: Inherited(Experiment::OPTIMIZE.to_string()),
         },
         Experiment {
             name: Experiment::STOP_BEFORE_STACKLESS_BYTECODE.to_string(),

diff --git a/third_party/move/move-compiler-v2/tests/file-format-generator/borrow.exp b/third_party/move/move-compiler-v2/tests/file-format-generator/borrow.exp
@@ -43,44 +43,53 @@ B0:
 	2: Ret
 }
 mut_field(Arg0: &mut S): u64 /* def_idx: 3 */ {
-L1:	loc0: &mut u64
+L1:	loc0: u64
+L2:	loc1: &mut u64
 B0:
 	0: MoveLoc[0](Arg0: &mut S)
 	1: MutBorrowField[0](S.f: u64)
-	2: StLoc[1](loc0: &mut u64)
-	3: LdU64(22)
-	4: CopyLoc[1](loc0: &mut u64)
-	5: WriteRef
-	6: MoveLoc[1](loc0: &mut u64)
-	7: ReadRef
-	8: Ret
+	2: LdU64(22)
+	3: StLoc[1](loc0: u64)
+	4: StLoc[2](loc1: &mut u64)
+	5: MoveLoc[1](loc0: u64)
+	6: CopyLoc[2](loc1: &mut u64)
+	7: WriteRef
+	8: MoveLoc[2](loc1: &mut u64)
+	9: ReadRef
+	10: Ret
 }
 mut_local(Arg0: u64): u64 /* def_idx: 4 */ {
 L1:	loc0: u64
-L2:	loc1: &mut u64
+L2:	loc1: u64
+L3:	loc2: &mut u64
 B0:
 	0: LdU64(33)
 	1: StLoc[1](loc0: u64)
 	2: MutBorrowLoc[1](loc0: u64)
+	3: LdU64(22)
+	4: StLoc[2](loc1: u64)
+	5: StLoc[3](loc2: &mut u64)
+	6: MoveLoc[2](loc1: u64)
+	7: CopyLoc[3](loc2: &mut u64)
+	8: WriteRef
+	9: MoveLoc[3](loc2: &mut u64)
+	10: ReadRef
+	11: Ret
+}
+mut_param(Arg0: u64): u64 /* def_idx: 5 */ {
+L1:	loc0: u64
+L2:	loc1: &mut u64
+B0:
+	0: MutBorrowLoc[0](Arg0: u64)
+	1: LdU64(22)
+	2: StLoc[1](loc0: u64)
 	3: StLoc[2](loc1: &mut u64)
-	4: LdU64(22)
+	4: MoveLoc[1](loc0: u64)
 	5: CopyLoc[2](loc1: &mut u64)
 	6: WriteRef
 	7: MoveLoc[2](loc1: &mut u64)
 	8: ReadRef
 	9: Ret
 }
-mut_param(Arg0: u64): u64 /* def_idx: 5 */ {
-L1:	loc0: &mut u64
-B0:
-	0: MutBorrowLoc[0](Arg0: u64)
-	1: StLoc[1](loc0: &mut u64)
-	2: LdU64(22)
-	3: CopyLoc[1](loc0: &mut u64)
-	4: WriteRef
-	5: MoveLoc[1](loc0: &mut u64)
-	6: ReadRef
-	7: Ret
-}
 }
 ============ bytecode verification succeeded ========
diff --git a/third_party/move/move-compiler-v2/tests/file-format-generator/bug_13952_stack_balance.exp b/third_party/move/move-compiler-v2/tests/file-format-generator/bug_13952_stack_balance.exp
@@ -14,25 +14,25 @@ B0:
 	0: ImmBorrowLoc[0](Arg0: bool)
 	1: StLoc[2](loc0: &bool)
 	2: CopyLoc[0](Arg0: bool)
-	3: BrFalse(16)
+	3: BrFalse(7)
 B1:
 	4: LdTrue
 	5: StLoc[3](loc1: bool)
+	6: Branch(9)
 B2:
-	6: ImmBorrowLoc[3](loc1: bool)
-	7: StLoc[4](loc2: &bool)
-	8: MoveLoc[2](loc0: &bool)
-	9: MoveLoc[4](loc2: &bool)
-	10: Neq
-	11: Pop
-	12: MoveLoc[0](Arg0: bool)
-	13: Pack[0](Struct0)
-	14: Pop
-	15: Ret
+	7: MoveLoc[1](Arg1: bool)
+	8: StLoc[3](loc1: bool)
 B3:
-	16: MoveLoc[1](Arg1: bool)
-	17: StLoc[3](loc1: bool)
-	18: Branch(6)
+	9: ImmBorrowLoc[3](loc1: bool)
+	10: StLoc[4](loc2: &bool)
+	11: MoveLoc[2](loc0: &bool)
+	12: MoveLoc[4](loc2: &bool)
+	13: Neq
+	14: MoveLoc[0](Arg0: bool)
+	15: Pack[0](Struct0)
+	16: Pop
+	17: Pop
+	18: Ret
 }
 }
 ============ bytecode verification succeeded ========
diff --git a/.../move/move-compiler-v2/tests/file-format-generator/bug_13952_stack_balance_regression.exp b/.../move/move-compiler-v2/tests/file-format-generator/bug_13952_stack_balance_regression.exp
@@ -17,13 +17,19 @@ enum Data has drop {
 
 test_v1(): bool /* def_idx: 0 */ {
 L0:	loc0: Data
+L1:	loc1: bool
 B0:
 	0: LdU64(43)
 	1: PackVariant[0](Data/V1)
 	2: StLoc[0](loc0: Data)
 	3: ImmBorrowLoc[0](loc0: Data)
 	4: TestVariant[0](Data/V1)
-	5: Ret
+	5: StLoc[1](loc1: bool)
+	6: CopyLoc[1](loc1: bool)
+	7: BrTrue(8)
+B1:
+	8: MoveLoc[1](loc1: bool)
+	9: Ret
 }
 test_v1v3(): bool /* def_idx: 1 */ {
 L0:	loc0: Data
@@ -42,35 +48,40 @@ B0:
 	6: TestVariant[0](Data/V1)
 	7: StLoc[2](loc2: bool)
 	8: CopyLoc[2](loc2: bool)
-	9: BrTrue(13)
+	9: BrTrue(15)
 B1:
 	10: MoveLoc[1](loc1: &Data)
 	11: TestVariant[1](Data/V3)
 	12: StLoc[2](loc2: bool)
+	13: CopyLoc[2](loc2: bool)
+	14: BrTrue(15)
 B2:
-	13: PackVariant[1](Data/V3)
-	14: StLoc[3](loc3: Data)
-	15: MoveLoc[2](loc2: bool)
-	16: BrFalse(29)
+	15: PackVariant[1](Data/V3)
+	16: StLoc[3](loc3: Data)
+	17: MoveLoc[2](loc2: bool)
+	18: BrFalse(32)
 B3:
-	17: ImmBorrowLoc[3](loc3: Data)
-	18: StLoc[4](loc4: &Data)
-	19: CopyLoc[4](loc4: &Data)
-	20: TestVariant[0](Data/V1)
-	21: StLoc[5](loc5: bool)
-	22: CopyLoc[5](loc5: bool)
-	23: BrTrue(27)
+	19: ImmBorrowLoc[3](loc3: Data)
+	20: StLoc[4](loc4: &Data)
+	21: CopyLoc[4](loc4: &Data)
+	22: TestVariant[0](Data/V1)
+	23: StLoc[5](loc5: bool)
+	24: CopyLoc[5](loc5: bool)
+	25: BrTrue(31)
 B4:
-	24: MoveLoc[4](loc4: &Data)
-	25: TestVariant[1](Data/V3)
-	26: StLoc[5](loc5: bool)
+	26: MoveLoc[4](loc4: &Data)
+	27: TestVariant[1](Data/V3)
+	28: StLoc[5](loc5: bool)
+	29: CopyLoc[5](loc5: bool)
+	30: BrTrue(31)
 B5:
-	27: MoveLoc[5](loc5: bool)
-	28: Ret
+	31: Branch(34)
 B6:
-	29: LdFalse
-	30: StLoc[5](loc5: bool)
-	31: Branch(27)
+	32: LdFalse
+	33: StLoc[5](loc5: bool)
+B7:
+	34: MoveLoc[5](loc5: bool)
+	35: Ret
 }
 }
 ============ bytecode verification succeeded ========
diff --git a/third_party/move/move-compiler-v2/tests/file-format-generator/const.exp b/third_party/move/move-compiler-v2/tests/file-format-generator/const.exp
@@ -144,36 +144,36 @@ test_constans() /* def_idx: 0 */ {
 B0:
 	0: LdTrue
 	1: Call u<bool>(bool): bool
-	2: Pop
-	3: LdFalse
-	4: Call u<bool>(bool): bool
-	5: Pop
-	6: LdU8(1)
-	7: Call u<u8>(u8): u8
-	8: Pop
-	9: LdU16(7086)
-	10: Call u<u16>(u16): u16
-	11: Pop
-	12: LdU32(14593408)
-	13: Call u<u32>(u32): u32
-	14: Pop
-	15: LdU64(51966)
-	16: Call u<u64>(u64): u64
-	17: Pop
-	18: LdU128(3735928559)
-	19: Call u<u128>(u128): u128
-	20: Pop
-	21: LdU256(301490978409967)
-	22: Call u<u256>(u256): u256
+	2: LdFalse
+	3: Call u<bool>(bool): bool
+	4: LdU8(1)
+	5: Call u<u8>(u8): u8
+	6: LdU16(7086)
+	7: Call u<u16>(u16): u16
+	8: LdU32(14593408)
+	9: Call u<u32>(u32): u32
+	10: LdU64(51966)
+	11: Call u<u64>(u64): u64
+	12: LdU128(3735928559)
+	13: Call u<u128>(u128): u128
+	14: LdU256(301490978409967)
+	15: Call u<u256>(u256): u256
+	16: LdConst[0](Address: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 66])
+	17: Call u<address>(address): address
+	18: LdConst[1](Vector(U64): [3, 1, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0])
+	19: Call u<vector<u64>>(vector<u64>): vector<u64>
+	20: LdConst[2](Vector(U8): [7, 72, 101, 108, 108, 111, 33, 10])
+	21: Call u<vector<u8>>(vector<u8>): vector<u8>
+	22: Pop
 	23: Pop
-	24: LdConst[0](Address: [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 66])
-	25: Call u<address>(address): address
+	24: Pop
+	25: Pop
 	26: Pop
-	27: LdConst[1](Vector(U64): [3, 1, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0])
-	28: Call u<vector<u64>>(vector<u64>): vector<u64>
+	27: Pop
+	28: Pop
 	29: Pop
-	30: LdConst[2](Vector(U8): [7, 72, 101, 108, 108, 111, 33, 10])
-	31: Call u<vector<u8>>(vector<u8>): vector<u8>
+	30: Pop
+	31: Pop
 	32: Pop
 	33: Ret
 }

diff --git a/third_party/move/move-compiler-v2/tests/file-format-generator/has_script.exp b/third_party/move/move-compiler-v2/tests/file-format-generator/has_script.exp
@@ -9,10 +9,12 @@ B0:
 	0: LdTrue
 	1: BrFalse(3)
 B1:
-	2: Ret
+	2: Branch(5)
 B2:
 	3: LdU64(1)
 	4: Abort
+B3:
+	5: Ret
 }
 }
 ============ bytecode verification succeeded ========
diff --git a/third_party/move/move-compiler-v2/tests/file-format-generator/if_else.exp b/third_party/move/move-compiler-v2/tests/file-format-generator/if_else.exp
@@ -10,25 +10,25 @@ L3:	loc1: u64
 L4:	loc2: u64
 B0:
 	0: MoveLoc[0](Arg0: bool)
-	1: BrFalse(10)
+	1: BrFalse(9)
 B1:
 	2: LdU64(1)
 	3: StLoc[2](loc0: u64)
 	4: MoveLoc[1](Arg1: u64)
 	5: MoveLoc[2](loc0: u64)
 	6: Add
 	7: StLoc[3](loc1: u64)
+	8: Branch(15)
 B2:
-	8: MoveLoc[3](loc1: u64)
-	9: Ret
+	9: LdU64(1)
+	10: StLoc[4](loc2: u64)
+	11: MoveLoc[1](Arg1: u64)
+	12: MoveLoc[4](loc2: u64)
+	13: Sub
+	14: StLoc[3](loc1: u64)
 B3:
-	10: LdU64(1)
-	11: StLoc[4](loc2: u64)
-	12: MoveLoc[1](Arg1: u64)
-	13: MoveLoc[4](loc2: u64)
-	14: Sub
-	15: StLoc[3](loc1: u64)
-	16: Branch(8)
+	15: MoveLoc[3](loc1: u64)
+	16: Ret
 }
 if_else_nested(Arg0: bool, Arg1: u64): u64 /* def_idx: 1 */ {
 L2:	loc0: u64
@@ -40,47 +40,47 @@ L7:	loc5: u64
 L8:	loc6: u64
 B0:
 	0: MoveLoc[0](Arg0: bool)
-	1: BrFalse(29)
+	1: BrFalse(9)
 B1:
 	2: LdU64(1)
 	3: StLoc[2](loc0: u64)
 	4: CopyLoc[1](Arg1: u64)
 	5: MoveLoc[2](loc0: u64)
 	6: Add
 	7: StLoc[3](loc1: u64)
+	8: Branch(15)
 B2:
-	8: LdU64(10)
-	9: StLoc[4](loc2: u64)
-	10: MoveLoc[3](loc1: u64)
-	11: MoveLoc[4](loc2: u64)
-	12: Gt
-	13: BrFalse(22)
+	9: LdU64(1)
+	10: StLoc[4](loc2: u64)
+	11: CopyLoc[1](Arg1: u64)
+	12: MoveLoc[4](loc2: u64)
+	13: Sub
+	14: StLoc[3](loc1: u64)
 B3:
-	14: LdU64(2)
-	15: StLoc[5](loc3: u64)
-	16: MoveLoc[1](Arg1: u64)
-	17: MoveLoc[5](loc3: u64)
-	18: Mul
-	19: StLoc[6](loc4: u64)
+	15: LdU64(10)
+	16: StLoc[5](loc3: u64)
+	17: MoveLoc[3](loc1: u64)
+	18: MoveLoc[5](loc3: u64)
+	19: Gt
+	20: BrFalse(28)
 B4:
-	20: MoveLoc[6](loc4: u64)
-	21: Ret
+	21: LdU64(2)
+	22: StLoc[6](loc4: u64)
+	23: MoveLoc[1](Arg1: u64)
+	24: MoveLoc[6](loc4: u64)
+	25: Mul
+	26: StLoc[7](loc5: u64)
+	27: Branch(34)
 B5:
-	22: LdU64(2)
-	23: StLoc[7](loc5: u64)
-	24: MoveLoc[1](Arg1: u64)
-	25: MoveLoc[7](loc5: u64)
-	26: Div
-	27: StLoc[6](loc4: u64)
-	28: Branch(20)
+	28: LdU64(2)
+	29: StLoc[8](loc6: u64)
+	30: MoveLoc[1](Arg1: u64)
+	31: MoveLoc[8](loc6: u64)
+	32: Div
+	33: StLoc[7](loc5: u64)
 B6:
-	29: LdU64(1)
-	30: StLoc[8](loc6: u64)
-	31: CopyLoc[1](Arg1: u64)
-	32: MoveLoc[8](loc6: u64)
-	33: Sub
-	34: StLoc[3](loc1: u64)
-	35: Branch(8)
+	34: MoveLoc[7](loc5: u64)
+	35: Ret
 }
 }
 ============ bytecode verification succeeded ========