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[CodeGen][CUDA] Enhance CUDA codegen for SelectNode #4983
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The test fails without this patch. It is also exposed by #4968, in which a simple kernel fails during the CUDA codegen // attr [iter_var(blockIdx.x, , blockIdx.x)] thread_extent = 98 |
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- This patch allows CUDA backend to emit correct code for selects with vector conditions, which may be produced by floordiv op lowering etc.. - This already works for llvm BE, as llvm select instruction supports vector conditions. Signed-off-by: Wei Pan <[email protected]>
Kindly ping. Can someone help review this PR? |
While I am not qualified to give a review of this, I have applied your changes on this PR and it I was able to compile a mxnet model to a cuda tvm graphruntime. autotvm also looks like it is working correctly. |
@wpan11nv, I think you have to tag some reviewers from here: |
@vinx13 Could you help review this PR? |
@jmorrill Thanks for confirming this fix! |
LGTM, but it seems indentation is broken in cuda source codegen. Not important, but would be nice to clean it up.
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Yes, I noticed that indention issue too. I will have a look. Thanks! |
- This patch allows CUDA backend to emit correct code for selects with vector conditions, which may be produced by floordiv op lowering etc.. - This already works for llvm BE, as llvm select instruction supports vector conditions. Signed-off-by: Wei Pan <[email protected]>
- This patch allows CUDA backend to emit correct code for selects with vector conditions, which may be produced by floordiv op lowering etc.. - This already works for llvm BE, as llvm select instruction supports vector conditions. Signed-off-by: Wei Pan <[email protected]>
This patch allows CUDA backend to emit correct code for
selects with vector conditions, which may be produced
by floordiv op lowering etc..
This already works for llvm BE, as llvm select instruction
supports vector conditions.
Signed-off-by: Wei Pan [email protected]
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