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Two small fixes to AMDCPU codegen for LLVM 10+ and ROCm 3.5+ (#5920)
- For LLVM 10+ we need to avoid calling Align with 0, or else we get a crash. - For ROCm 3.5+ we need to use code object 3 (the default in LLVM 9+) but for ROCm < 3.5 we want the code object 2. - As we want to separate codegen from the API, we need to add a device api query for the version. But every one else wants now one, too. (But I only filled it in for CUDA for now.) - I'm throwing in an addition of kMaxRegistersPerBlock for ROCm. This was introduced for CUDA in #5898.
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Original file line number | Diff line number | Diff line change |
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@@ -69,6 +69,8 @@ | |
return; | ||
case kGcnArch: | ||
return; | ||
case kApiVersion: | ||
return; | ||
} | ||
} | ||
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