[BACKPORT-0.6][Bugfix][VTA] Fix multiple transfer issue in LoadUop mo…

…dule (#5882) Co-authored-by: Liangfu Chen <[email protected]>
apache · Jun 22, 2020 · 69367e7 · 69367e7
1 parent cd47a34
commit 69367e7
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/vta/hardware/chisel/src/main/scala/core/LoadUop.scala b/vta/hardware/chisel/src/main/scala/core/LoadUop.scala
@@ -173,7 +173,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module {
         }
       }
       .elsewhen(io.vme_rd.data.fire()) {
-        when(xcnt === xlen - 1.U) {
+      when((xcnt === xlen - 1.U) && (xrem === 0.U)) {
           wmask := "b_01".U.asTypeOf(wmask)
         }.otherwise {
           wmask := "b_11".U.asTypeOf(wmask)
@@ -183,7 +183,7 @@ class LoadUop(debug: Boolean = false)(implicit p: Parameters) extends Module {
     when(io.vme_rd.cmd.fire()) {
       wmask := "b_10".U.asTypeOf(wmask)
     }.elsewhen(io.vme_rd.data.fire()) {
-      when(sizeIsEven && xcnt === xlen - 1.U) {
+      when(sizeIsEven && (xcnt === xlen - 1.U) && (xrem === 0.U)) {
         wmask := "b_01".U.asTypeOf(wmask)
       }.otherwise {
         wmask := "b_11".U.asTypeOf(wmask)