Turbulence and Deep Learning
-
Stanfod | MINES ParisTech
- Palo Alto, CA
-
10:39
(UTC -08:00)
Highlights
Pinned Loading
-
Couette-Poiseuille_FlowCode
Couette-Poiseuille_FlowCode PublicCompute Flow Parameters for a Couette-Poiseuille Flow.
-
-
shakti-soc
shakti-soc PublicSHAKTI (microprocessor) RISC-V ISA / FPGA - the first indigenous Indian industrial-grade processor
Verilog
-
Simulations-on-TPU
Simulations-on-TPU PublicForked from google-research/swirl-lm
TensorFlow on TPU (and GPU) for Computational Fluid Dynamics CFD Simulations
Python
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.