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MOCK: RISC-V: Tests for 'Zce' implications
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**NEVER COMMIT THIS.**

This commit is intended to be merged to the previous patch once 'Zcmp'
and 'Zcmt' extensions are ready.

It adds several tests related to 'Zce' implications.

bfd/ChangeLog:

	* elfxx-riscv.c: [MOCK] Uncomment mock lines to pass the test.

gas/ChangeLog:

	* testsuite/gas/riscv/march-imply-zce.d: New test.
	* testsuite/gas/riscv/march-imply-zce-f-32.d: Likewise.
	* testsuite/gas/riscv/march-imply-zce-f-64.d: Likewise.
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a4lg committed Aug 11, 2023
1 parent 0117fa8 commit cd8ce76
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Showing 4 changed files with 21 additions and 4 deletions.
7 changes: 3 additions & 4 deletions bfd/elfxx-riscv.c
Original file line number Diff line number Diff line change
Expand Up @@ -1350,10 +1350,9 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
{"zcb", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcd", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
/* MOCK: uncomment those lines once ready. */
// {"zce", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
// {"zcmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
// {"zcmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zce", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zcmt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{NULL, 0, 0, 0, 0}
};

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6 changes: 6 additions & 0 deletions gas/testsuite/gas/riscv/march-imply-zce-f-32.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
#as: -march=rv32if_zce -march-attr -misa-spec=20191213
#readelf: -A
#source: empty.s
Attribute Section: riscv
File Attributes
Tag_RISCV_arch: "rv32i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcf1p0_zcmp1p0_zcmt1p0"
6 changes: 6 additions & 0 deletions gas/testsuite/gas/riscv/march-imply-zce-f-64.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
#as: -march=rv64if_zce -march-attr -misa-spec=20191213
#readelf: -A
#source: empty.s
Attribute Section: riscv
File Attributes
Tag_RISCV_arch: "rv64i2p1_f2p2_zicsr2p0_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0"
6 changes: 6 additions & 0 deletions gas/testsuite/gas/riscv/march-imply-zce.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,6 @@
#as: -march=rv32i_zce -march-attr -misa-spec=20191213
#readelf: -A
#source: empty.s
Attribute Section: riscv
File Attributes
Tag_RISCV_arch: "rv32i2p1_zca1p0_zcb1p0_zce1p0_zcmp1p0_zcmt1p0"

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