RISC-V: Remove RV32EF conflict

Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later versions beginning with the version 20190608-Base-Ratified removed this restriction. Because the 'E' extension is still a draft, the author chose to *just* remove the conflict (not checking the ISA version). Note that, because RV32E is only used with a soft-float calling convention, there's no valid official ABI for RV32EF. It means, even if we can assemble a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept in an unmanaged state (outside ABI management). The purpose of this commit is to suppress unnecessary errors while parsing an ISA string and/or disassembling, not to allow hard-float with RVE. bfd/ChangeLog: * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF because only older specifications disallowed it. gas/ChangeLog: * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly prohibited. * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
a4lg · Sep 17, 2022 · 6f5239f · 6f5239f
1 parent 5e3cecb
commit 6f5239f
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diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
@@ -1845,13 +1845,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps)
       rps->error_handler (_("rv%d does not support the `q' extension"), xlen);
       no_conflict = false;
     }
-  if (riscv_lookup_subset (rps->subset_list, "e", &subset)
-      && riscv_lookup_subset (rps->subset_list, "f", &subset))
-    {
-      rps->error_handler
-        (_("rv32e does not support the `f' extension"));
-      no_conflict = false;
-    }
   if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset)
       && riscv_lookup_subset (rps->subset_list, "f", &subset))
     {

diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d
diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l