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RISC-V: Print using .dword on RV64
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`riscv_disassemble_data' has an ability to print 8-byte data with .dword
but this is not utilized.  This is possibly because, XLEN was not set
before disassembling an instruction.

Since prerequisite commits now set XLEN in `riscv_get_disassembler', it's
now safe to use .dword on RV64.

gas/ChangeLog:

	* testsuite/gas/riscv/mapping-04b.d: Change to use RV64I.  Check
	that .dword is actually used.
	* testsuite/gas/riscv/mapping-norelax-04b.d: Likewise.
	* testsuite/gas/riscv/mapping-04b-32.d: New test, the same as
	mapping-04b except it uses RV32I and .dword should not be used.

opcodes/ChangeLog:

	* riscv-dis.c (riscv_data_length): Print using .dword on RV64.
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a4lg committed Aug 31, 2022
1 parent e172ae5 commit 5bb204f
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Showing 4 changed files with 38 additions and 12 deletions.
23 changes: 23 additions & 0 deletions gas/testsuite/gas/riscv/mapping-04b-32.d
Original file line number Diff line number Diff line change
@@ -0,0 +1,23 @@
#as: -march=rv32i
#source: mapping-04.s
#objdump: -d

.*:[ ]+file format .*


Disassembly of section .text:

0+000 <.text>:
[ ]+0:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+4:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+8:[ ]+00000001[ ]+.word[ ]+0x00000001
[ ]+c:[ ]+00[ ]+.byte[ ]+0x00
[ ]+d:[ ]+00000013[ ]+nop
[ ]+11:[ ]+00a50533[ ]+add[ ]+a0,a0,a0
[ ]+15:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+19:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+1d:[ ]+2002[ ]+.short[ ]+0x2002
[ ]+1f:[ ]+00b585b3[ ]+add[ ]+a1,a1,a1
[ ]+23:[ ]+0000[ ]+.2byte[ ]+0x0
[ ]+25:[ ]+0000[ ]+.2byte[ ]+0x0
#...
8 changes: 3 additions & 5 deletions gas/testsuite/gas/riscv/mapping-04b.d
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#as:
#as: -march=rv64i
#source: mapping-04.s
#objdump: -d

Expand All @@ -8,14 +8,12 @@
Disassembly of section .text:

0+000 <.text>:
[ ]+0:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+4:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+0:[ ]+0000100100001001[ ]+.dword[ ]+0x0000100100001001
[ ]+8:[ ]+00000001[ ]+.word[ ]+0x00000001
[ ]+c:[ ]+00[ ]+.byte[ ]+0x00
[ ]+d:[ ]+00000013[ ]+nop
[ ]+11:[ ]+00a50533[ ]+add[ ]+a0,a0,a0
[ ]+15:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+19:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+15:[ ]+2002200220022002[ ]+.dword[ ]+0x2002200220022002
[ ]+1d:[ ]+2002[ ]+.short[ ]+0x2002
[ ]+1f:[ ]+00b585b3[ ]+add[ ]+a1,a1,a1
[ ]+23:[ ]+0000[ ]+.2byte[ ]+0x0
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8 changes: 3 additions & 5 deletions gas/testsuite/gas/riscv/mapping-norelax-04b.d
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
#as: -mno-relax
#as: -march=rv64i -mno-relax
#source: mapping-04.s
#objdump: -d

Expand All @@ -8,15 +8,13 @@
Disassembly of section .text:

0+000 <.text>:
[ ]+0:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+4:[ ]+00001001[ ]+.word[ ]+0x00001001
[ ]+0:[ ]+0000100100001001[ ]+.dword[ ]+0x0000100100001001
[ ]+8:[ ]+00000001[ ]+.word[ ]+0x00000001
[ ]+c:[ ]+00[ ]+.byte[ ]+0x00
[ ]+d:[ ]+00[ ]+.byte[ ]+0x00
[ ]+e:[ ]+0001[ ]+.2byte[ ]+0x1
[ ]+10:[ ]+00a50533[ ]+add[ ]+a0,a0,a0
[ ]+14:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+18:[ ]+20022002[ ]+.word[ ]+0x20022002
[ ]+14:[ ]+2002200220022002[ ]+.dword[ ]+0x2002200220022002
[ ]+1c:[ ]+2002[ ]+.short[ ]+0x2002
[ ]+1e:[ ]+00b585b3[ ]+add[ ]+a1,a1,a1
[ ]+22:[ ]+0001[ ]+.2byte[ ]+0x1
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11 changes: 9 additions & 2 deletions opcodes/riscv-dis.c
Original file line number Diff line number Diff line change
Expand Up @@ -1000,7 +1000,7 @@ riscv_data_length (bfd_vma memaddr,
bfd_vma length;
bool found = false;

length = 4;
length = xlen > 32 ? 8 : 4;
if (info->symtab_size != 0
&& bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour
&& last_map_symbol >= 0)
Expand All @@ -1027,7 +1027,14 @@ riscv_data_length (bfd_vma memaddr,
offset -= memaddr;
length = (offset < length) ? offset : length;
}
length = length == 3 ? 2 : length;
static const bfd_vma aligned_length[] = {
/* [0..0] */ 0,
/* [1..1] */ 1,
/* [2..3] */ 2, 2,
/* [4..7] */ 4, 4, 4, 4,
/* [8..8] */ 8,
};
length = aligned_length[length];
return length;
}

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