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RISC-V: Move register name file initialization
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This is (a) to group per-option register name file initialization
together with Zfinx handling and (b) to prepare future RV32E handling.

opcodes/ChangeLog:

	* riscv-dis.c (set_default_riscv_dis_options): Move setting
	actual register names to init_dis_per_arch_and_options.
	(parse_riscv_dis_option_without_args): Likewise.
	(init_dis_per_arch_and_options): Set register names when the
	architecture or an option is changed.
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a4lg committed Jul 11, 2022
1 parent 894ec94 commit 561ca1d
Showing 1 changed file with 7 additions and 6 deletions.
13 changes: 7 additions & 6 deletions opcodes/riscv-dis.c
Original file line number Diff line number Diff line change
Expand Up @@ -65,12 +65,14 @@ static const char * const *riscv_fpr_names;
/* If set, disassemble as most general instruction. */
static bool no_aliases = false;

/* If set, disassemble with numeric registers. */
static bool is_numeric = false;

static void
set_default_riscv_dis_options (void)
{
riscv_gpr_names = riscv_gpr_names_abi;
riscv_fpr_names = riscv_fpr_names_abi;
no_aliases = false;
is_numeric = false;
}

static bool
Expand All @@ -79,10 +81,7 @@ parse_riscv_dis_option_without_args (const char *option)
if (strcmp (option, "no-aliases") == 0)
no_aliases = true;
else if (strcmp (option, "numeric") == 0)
{
riscv_gpr_names = riscv_gpr_names_numeric;
riscv_fpr_names = riscv_fpr_names_numeric;
}
is_numeric = true;
else
return false;
return true;
Expand Down Expand Up @@ -174,6 +173,8 @@ init_dis_per_arch (void)
static void
init_dis_per_arch_and_options (void)
{
riscv_gpr_names = is_numeric ? riscv_gpr_names_numeric : riscv_gpr_names_abi;
riscv_fpr_names = is_numeric ? riscv_fpr_names_numeric : riscv_fpr_names_abi;
/* If arch has Zfinx extension, use GPR to disassemble. */
if (riscv_subset_supports (&riscv_rps_dis, "zfinx"))
riscv_fpr_names = riscv_gpr_names;
Expand Down

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