RISC-V: Imply 'Zicsr' from privileged extensions with CSRs

'H', 'Smstateen', 'Sscofpmf' and 'Sstc' are four privileged extensions with
their CSR definitions and 'Smepmp' is a privileged extension with additional
CSR bits.

Volume II: Privileged Architecture of the RISC-V ISA Manual states that the
privileged architecture requires the 'Zicsr' extension.  However, current
GNU Binutils has no direct way whether the program has dependency to the
privileged architecture itself.

As a workaround, we should add implications from privileged extensions that
either add new CSRs, extend existing CSRs or depends on using CSRs.

This commit adds such implications for existing privileged extensions that
satisfy this condition.

gas/ChangeLog:

	* testsuite/gas/riscv/march-imply-h.d: New test, at least for 'H'.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_implicit_subsets): Add 'Zicsr'
	implicications for privileged extensions 'H', 'Smstateen',
	'Sscofpmf', 'Sstc' and 'Smepmp'.

bfd/elfxx-riscv.c

@@ -1047,6 +1047,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"g", "zicsr",	check_implicit_always},
   {"g", "zifencei",	check_implicit_always},
   {"m", "zmmul",	check_implicit_always},
+  {"h", "zicsr",	check_implicit_always},
   {"q", "d",		check_implicit_always},
   {"v", "d",		check_implicit_always},
   {"v", "zve64d",	check_implicit_always},
@@ -1096,6 +1097,10 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"zks", "zbkx",	check_implicit_always},
   {"zks", "zksed",	check_implicit_always},
   {"zks", "zksh",	check_implicit_always},
+  {"smepmp", "zicsr",		check_implicit_always},
+  {"smstateen", "zicsr",	check_implicit_always},
+  {"sscofpmf", "zicsr",		check_implicit_always},
+  {"sstc", "zicsr",		check_implicit_always},
   {NULL, NULL, NULL}
 };
 

gas/testsuite/gas/riscv/march-imply-h.d

@@ -0,0 +1,6 @@
+#as: -march=rv32ih -march-attr -misa-spec=20191213 -mpriv-spec=1.12
+#readelf: -A
+#source: empty.s
+Attribute Section: riscv
+File Attributes
+  Tag_RISCV_arch: "rv32i2p1_h1p0_zicsr2p0"