re: Support Intel AMX-FP16

Fix these fails due to the target padding out sections with nops. x86_64-w64-mingw32 +FAIL: x86_64 AMX-FP16 insns x86_64-w64-mingw32 +FAIL: x86_64 AMX-FP16 insns (Intel disassembly) * testsuite/gas/i386/x86-64-amx-fp16-intel.d: Accept trailing nops. * testsuite/gas/i386/x86-64-amx-fp16.d: Likewise.
a4lg · Oct 27, 2022 · 2c02c72 · 2c02c72
1 parent 1ad4041
commit 2c02c72
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diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d b/gas/testsuite/gas/i386/x86-64-amx-fp16-intel.d
@@ -11,3 +11,4 @@ Disassembly of section \.text:
 0+ <_start>:
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps tmm3,tmm4,tmm5
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps tmm3,tmm4,tmm5
+#pass
diff --git a/gas/testsuite/gas/i386/x86-64-amx-fp16.d b/gas/testsuite/gas/i386/x86-64-amx-fp16.d
@@ -11,3 +11,4 @@ Disassembly of section \.text:
 0+ <_start>:
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps %tmm5,%tmm4,%tmm3
 [ 	]*[a-f0-9]+:[ 	]*c4 e2 53 5c dc[ 	]*tdpfp16ps %tmm5,%tmm4,%tmm3
+#pass