RISC-V: Add comment to riscv_disassemble_insn

While other steps are annotated, extension test by instruction class was
not annotated or commented.

opcodes/ChangeLog:

	* riscv-dis.c (riscv_disassemble_insn) Add comment.

opcodes/riscv-dis.c

@@ -728,7 +728,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info)
       /* Is this instruction restricted to a certain value of XLEN?  */
       if ((op->xlen_requirement != 0) && (op->xlen_requirement != xlen))
 	continue;
-
+      /* Is this instruction supported by the current architecture?  */
       if (!riscv_multi_subset_supports (&riscv_rps_dis, op->insn_class))
 	continue;