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[Snippets] Added support of Port Descriptor #106
[Snippets] Added support of Port Descriptor #106
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1st part
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2nd part
} | ||
} | ||
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PortDescriptor PortDescriptor::deserialize(const std::string& serialized_info) { |
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Minor for discussion: do we really need deserialization of Port descriptor? If we do, than is it sufficient to enable correct serialization-deserialization of the subgraph?
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I don't know because I just moved it from TensorDescriptor
too. I don't know for what it, to be honest. I removed it.
Moreover, I don't understand why we need serialization :)
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Let's discuss it on review of the main PR.
src/plugins/intel_cpu/src/transformations/snippets/x64/op/brgemm_cpu.hpp
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src/plugins/intel_cpu/src/transformations/snippets/x64/op/brgemm_cpu.cpp
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template<typename T> | ||
void set_full_port_desc(const T& port) { | ||
const auto& shape = port.get_shape(); | ||
ngraph::snippets::PortManager::set_port_descriptor_ptr(port, std::make_shared<ngraph::snippets::PortDescriptor>(shape, |
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Do we absolutely need subtensor filled with FULL_DIM
here? Can it just be equal to shape?
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We can use in general shape for subtensor. Because just image that we have Brgemm
with input_shape0=[1,16]
. It's equal to common subtensor for eltwises. But we mustn't add Brgemm
and Eltwise
into one Loop. So to avoid these situations, I added the separate flag FULL_DIM
- it fully described schedule by full axis.
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TODO: Discussed offline: use VECTOR_SIZE
instead of FULL_DIM
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src/plugins/intel_cpu/src/transformations/snippets/x64/op/brgemm_cpu.cpp
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* [Snippets] Added support of Port Descriptor * review * Added Softmax support via common pipeline * Added Brgemm marking via general pipeline * TensorDescriptor -> ExpressionPort * Refactored expression factory * ExpressionPort - is interface * refactoring * fixed init loops * fixed brgemm ops * Moved PortDescriptor to lowered level * Removed PortDesc getters and setters from ExpressionPort and Tensor * Applied comments
* [Snippets] Added support of Port Descriptor * review * Added Softmax support via common pipeline * Added Brgemm marking via general pipeline * TensorDescriptor -> ExpressionPort * Refactored expression factory * ExpressionPort - is interface * refactoring * fixed init loops * fixed brgemm ops * Moved PortDescriptor to lowered level * Removed PortDesc getters and setters from ExpressionPort and Tensor * Applied comments
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