Update benchmarks.md

Xilinx · Mar 7, 2024 · feb8142 · feb8142
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commit feb8142
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diff --git a/docs/benchmarks.md b/docs/benchmarks.md
@@ -7,6 +7,8 @@ tables:
 
 ## Benchmarks published during contest
 
+Available from [https://github.com/Xilinx/fpga24_routing_contest/releases/latest/download/benchmarks.tar.gz](https://github.com/Xilinx/fpga24_routing_contest/releases/latest/download/benchmarks.tar.gz)
+
 |Source Benchmark Suite|Benchmark Name|LUTs|FFs|DSPs|BRAMs|OOC [1]|
 |----------------------|--------------|----|---|----|-----|-------|
 | [LogicNets](https://github.com/Xilinx/logicnets)                                                                        |`jscl` (Jet Substructure Classification L)         |31k |2k  |0   |0  |Y   |
@@ -35,6 +37,8 @@ third became an out of context port.
 
 ## Benchmarks used for final evaluation
 
+Available from [https://github.com/Xilinx/fpga24_routing_contest/releases/latest/download/benchmarks-evaluation.tar.gz](https://github.com/Xilinx/fpga24_routing_contest/releases/latest/download/benchmarks-evaluation.tar.gz)
+
 |Source Benchmark Suite|Benchmark Name|LUTs|FFs|DSPs|BRAMs|OOC [1]|
 |----------------------|--------------|----|---|----|-----|-------|
 | [RapidWright](https://github.com/Xilinx/RapidWright)                                                                    |`picoblaze_array`                                      |76k |77k  |0   |0  |Y   |