Simulator for memory access patterns of FPGA-based graph processing accelerators.
Citation:
If you find this work useful for your research, please cite (for which the library was developed):
@article{DBLP:journals/corr/abs-2104-07776,
author = {Jonas Dann and
Daniel Ritter and
Holger Fr{\"{o}}ning},
title = {Demystifying Memory Access Patterns of FPGA-Based Graph Processing
Accelerators},
journal = {CoRR},
volume = {abs/2104.07776},
year = {2021},
url = {https://arxiv.org/abs/2104.07776},
archivePrefix = {arXiv},
eprint = {2104.07776},
timestamp = {Mon, 19 Apr 2021 16:45:47 +0200},
biburl = {https://dblp.org/rec/journals/corr/abs-2104-07776.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
or for reproducibility and memory access patterns:
@inproceedings{DBLP:conf/btw/Dann0F21,
author = {Jonas Dann and
Daniel Ritter and
Holger Fr{\"{o}}ning},
title = {Exploring Memory Access Patterns for Graph Processing Accelerators},
booktitle = {Datenbanksysteme f{\"{u}}r Business, Technologie und Web {(BTW}
2021), 19. Fachtagung des GI-Fachbereichs ,,Datenbanken und Informationssysteme"
(DBIS), 13.-17. September 2021, Dresden, Germany, Proceedings},
pages = {101--122},
year = {2021},
crossref = {DBLP:conf/btw/2021},
url = {https://doi.org/10.18420/btw2021-05},
doi = {10.18420/btw2021-05},
timestamp = {Sat, 20 Mar 2021 14:01:16 +0100},
biburl = {https://dblp.org/rec/conf/btw/Dann0F21.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}