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add implied literals #63

Merged
merged 5 commits into from
Jan 22, 2021
Merged

add implied literals #63

merged 5 commits into from
Jan 22, 2021

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talf301
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@talf301 talf301 commented Jan 20, 2021

add functionality and testing for computing the implied literals at every node of a logic circuit

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codecov bot commented Jan 20, 2021

Codecov Report

Merging #63 (5230971) into master (4f8e400) will increase coverage by 0.12%.
The diff coverage is 93.75%.

Impacted file tree graph

@@            Coverage Diff             @@
##           master      #63      +/-   ##
==========================================
+ Coverage   81.92%   82.04%   +0.12%     
==========================================
  Files          29       29              
  Lines        2373     2389      +16     
==========================================
+ Hits         1944     1960      +16     
  Misses        429      429              
Impacted Files Coverage Δ
src/LoadSave/circuit_loaders.jl 99.37% <ø> (ø)
src/queries.jl 98.37% <93.75%> (-0.70%) ⬇️
src/transformations.jl 95.33% <0.00%> (+0.42%) ⬆️

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Looks good, feel free to merge. Only one comment regarding docs.

@@ -223,6 +224,40 @@ function isdeterministic(root::LogicCircuit)::Bool
result
end


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I guess you could also add a doc string to describe input/outputs and what implied_literals means a bit.

@talf301 talf301 merged commit 6659045 into master Jan 22, 2021
@talf301 talf301 deleted the marginal-map branch January 22, 2021 01:40
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2 participants