stm32: Support PB7/PB6 for USART1 on stm32f0

Add support for USART1 on PB7/PB6. Remove STM32_SERIAL_USART1_ALT_PA15_PA14 option and allow all serial mappings to be used on stm32f031. Reported by @Desuuuu. Signed-off-by: Kevin O'Connor <[email protected]>
Tircown · Aug 1, 2021 · 0971a8c · 0971a8c
1 parent 69d9497
commit 0971a8c
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Showing 2 changed files with 17 additions and 10 deletions.
diff --git a/src/stm32/Kconfig b/src/stm32/Kconfig
@@ -237,11 +237,8 @@ choice
     config STM32_SERIAL_USART1
         bool "Serial (on USART1 PA10/PA9)"
         select SERIAL
-    config STM32_SERIAL_USART1_ALT_PA15_PA14
-        bool "Serial (on USART1 PA15/PA14)" if LOW_LEVEL_OPTIONS && MACH_STM32F0
-        select SERIAL
     config STM32_SERIAL_USART1_ALT_PB7_PB6
-        bool "Serial (on USART1 PB7/PB6)" if LOW_LEVEL_OPTIONS && !MACH_STM32F0
+        bool "Serial (on USART1 PB7/PB6)" if LOW_LEVEL_OPTIONS
         select SERIAL
     config STM32_SERIAL_USART2
         bool "Serial (on USART2 PA3/PA2)" if LOW_LEVEL_OPTIONS

diff --git a/src/stm32/stm32f0_serial.c b/src/stm32/stm32f0_serial.c
@@ -16,28 +16,38 @@
   DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA10,PA9");
   #define GPIO_Rx GPIO('A', 10)
   #define GPIO_Tx GPIO('A', 9)
+  #define USARTx_FUNCTION GPIO_FUNCTION(1)
   #define USARTx USART1
   #define USARTx_IRQn USART1_IRQn
-#elif CONFIG_STM32_SERIAL_USART1_ALT_PA15_PA14
-  DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
-  #define GPIO_Rx GPIO('A', 15)
-  #define GPIO_Tx GPIO('A', 14)
+#elif CONFIG_STM32_SERIAL_USART1_ALT_PB7_PB6
+  DECL_CONSTANT_STR("RESERVE_PINS_serial", "PB7,PB6");
+  #define GPIO_Rx GPIO('B', 7)
+  #define GPIO_Tx GPIO('B', 6)
+  #define USARTx_FUNCTION GPIO_FUNCTION(0)
   #define USARTx USART1
   #define USARTx_IRQn USART1_IRQn
 #elif CONFIG_STM32_SERIAL_USART2
   DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
   #define GPIO_Rx GPIO('A', 3)
   #define GPIO_Tx GPIO('A', 2)
+  #define USARTx_FUNCTION GPIO_FUNCTION(1)
   #define USARTx USART2
   #define USARTx_IRQn USART2_IRQn
 #elif CONFIG_STM32_SERIAL_USART2_ALT_PA15_PA14
   DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA14");
   #define GPIO_Rx GPIO('A', 15)
   #define GPIO_Tx GPIO('A', 14)
+  #define USARTx_FUNCTION GPIO_FUNCTION(1)
   #define USARTx USART2
   #define USARTx_IRQn USART2_IRQn
 #endif
 
+#if CONFIG_MACH_STM32F031
+// The stm32f031 has same pins for USART2, but everything is routed to USART1
+#define USART2 USART1
+#define USART2_IRQn USART1_IRQn
+#endif
+
 #define CR1_FLAGS (USART_CR1_UE | USART_CR1_RE | USART_CR1_TE   \
                    | USART_CR1_RXNEIE)
 
@@ -75,7 +85,7 @@ serial_init(void)
     USARTx->CR1 = CR1_FLAGS;
     armcm_enable_irq(USARTx_IRQHandler, USARTx_IRQn, 0);
 
-    gpio_peripheral(GPIO_Rx, GPIO_FUNCTION(1), 1);
-    gpio_peripheral(GPIO_Tx, GPIO_FUNCTION(1), 0);
+    gpio_peripheral(GPIO_Rx, USARTx_FUNCTION, 1);
+    gpio_peripheral(GPIO_Tx, USARTx_FUNCTION, 0);
 }
 DECL_INIT(serial_init);