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CSR Registers access error #52

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mvlamar opened this issue Oct 1, 2019 · 3 comments
Closed

CSR Registers access error #52

mvlamar opened this issue Oct 1, 2019 · 3 comments

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@mvlamar
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mvlamar commented Oct 1, 2019

Hi,
The program

.text
csrrs t0, 3072, x0 # trying to read CSR cycle register

causes: Error in riscv1.asm line 2 column 10: "3072": operand is out of range
The same for read instret, cycleh, and instreth registers.

[]
Marcus Vinicius

@TheThirdOne
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This is totally a bug. It seems to just be a matter of the assembler rejecting the CSR number as too big. I think I have it fixed locally, but I want to write some tests and check manually a little more thoroughly before I commit the changes.

Thanks for your reports; you've helped improve RARS considerably.

TheThirdOne added a commit that referenced this issue Oct 4, 2019
Progress towards #52. I would like to include tests for CSR instructions in
this, but I realized that RARS has possibly incorrect behaviour in several ways.
Writing a test that ensures correctness might be kindof hard so I am pushing
this out to solve th3e immediate problems.

Problems I think RARS currently has:
  - writing to intret (and others) should be an error
  - uip (and others) should have write protection on some bits
  - csrrs might set the value of rd to the wrong version of the CSR eg after the instruction rather than before

These should be added to #2.
@TheThirdOne
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I pushed the change I made 2 days ago. I think I will need to spend more time with CSRs, but I wanted to get this fix out as it may take some time to check/fix the other issues.

@mvlamar
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mvlamar commented Oct 7, 2019

It is OK now!
Thank you!!!

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