GitHub - Sina-Ghorbani2001/ARM968E-S: Implementation of ARM processor in Verilog

Sina-Ghorbani2001 / ARM968E-S Public

Implementation of ARM processor in Verilog

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Name		Name	Last commit message	Last commit date
Latest commit History 9 Commits
ALU.v		ALU.v
ARM.v		ARM.v
ARM_TB.sv		ARM_TB.sv
Adder.v		Adder.v
Condition_Check.v		Condition_Check.v
Control_Unit.v		Control_Unit.v
EX_Stage.v		EX_Stage.v
EX_Stage_Reg.v		EX_Stage_Reg.v
Hazard_Detection_Unit.v		Hazard_Detection_Unit.v
ID_Stage.v		ID_Stage.v
ID_Stage_Reg.v		ID_Stage_Reg.v
IF_Stage.v		IF_Stage.v
IF_Stage_Reg.v		IF_Stage_Reg.v
Ins_Mem.v		Ins_Mem.v
MA_Stage.v		MA_Stage.v
MA_Stage_Reg.v		MA_Stage_Reg.v
MUX2to1.v		MUX2to1.v
PC.v		PC.v
RegisterFile.v		RegisterFile.v
Val2_Generator.v		Val2_Generator.v
WB_Stage.v		WB_Stage.v
WB_Stage_Reg.v		WB_Stage_Reg.v